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Searched refs:GICR_ICFGR0 (Results 1 – 4 of 4) sorted by relevance

/external/arm-trusted-firmware/plat/mediatek/mt8192/
Dplat_mt_gic.c105 gic_data.saved_conf0 = mmio_read_32(gicr_base + GICR_ICFGR0); in mt_gic_rdistif_save()
123 mmio_write_32(gicr_base + GICR_ICFGR0, gic_data.saved_conf0); in mt_gic_rdistif_restore()
140 mmio_write_32(gicr_base + GICR_ICFGR0, gic_data.saved_conf0); in mt_gic_rdistif_restore_all()
/external/arm-trusted-firmware/plat/mediatek/mt8183/
Dplat_mt_gic.c120 gic_data.saved_conf0 = mmio_read_32(gicr_base + GICR_ICFGR0); in mt_gic_rdistif_save()
137 mmio_write_32(gicr_base + GICR_ICFGR0, gic_data.saved_conf0); in mt_gic_rdistif_restore()
/external/arm-trusted-firmware/include/drivers/arm/
Dgicv3.h177 #define GICR_ICFGR0 (GICR_SGIBASE_OFFSET + U(0xc00)) macro
189 #define GICR_ICFGR GICR_ICFGR0
/external/arm-trusted-firmware/drivers/arm/gic/v3/
Dgicv3_private.h396 return mmio_read_32(base + GICR_ICFGR0); in gicr_read_icfgr0()
406 mmio_write_32(base + GICR_ICFGR0, val); in gicr_write_icfgr0()