/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | HexagonVLIWPacketizer.cpp | 115 const HexagonInstrInfo *HII = nullptr; member in __anon3bd10c4d0111::HexagonPacketizer 138 HII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); in INITIALIZE_PASS_DEPENDENCY() 207 HII = HST.getInstrInfo(); in runOnMachineFunction() 214 HII->genAllInsnTimingClasses(MF); in runOnMachineFunction() 247 HII->translateInstrsForDup(MF, true); in runOnMachineFunction() 256 while (RB != End && HII->isSchedulingBoundary(*RB, &MB, MF)) in runOnMachineFunction() 261 while (RE != End && !HII->isSchedulingBoundary(*RE, &MB, MF)) in runOnMachineFunction() 276 HII->translateInstrsForDup(MF, false); in runOnMachineFunction() 296 auto *ExtMI = MF.CreateMachineInstr(HII->get(Hexagon::A4_ext), DebugLoc()); in tryAllocateResourcesForConstExt() 310 if (HII->isDeallocRet(MI)) in isCallDependent() [all …]
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D | HexagonBranchRelaxation.cpp | 68 const HexagonInstrInfo *HII; member 95 HII = HST.getInstrInfo(); in runOnMachineFunction() 116 InstOffset += HII->getSize(MI); in computeOffset() 118 if (MI.isBranch() && HII->isExtendable(MI)) in computeOffset() 150 if (HII->isExtended(MI)) in isJumpOutOfRange() 159 InstOffset += HII->nonDbgBBSize(&B) * HEXAGON_INSTR_SIZE; in isJumpOutOfRange() 165 if (HII->analyzeBranch(B, TBB, FBB, Cond, false)) { in isJumpOutOfRange() 169 if (HII->isNewValueJump(*FirstTerm)) in isJumpOutOfRange() 170 TBB = FirstTerm->getOperand(HII->getCExtOpNum(*FirstTerm)).getMBB(); in isJumpOutOfRange() 175 return !HII->isJumpWithinBranchRange(*FirstTerm, Distance); in isJumpOutOfRange() [all …]
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D | HexagonOptAddrMode.cpp | 83 const HexagonInstrInfo *HII = nullptr; member in __anon9b57208c0111::HexagonOptAddrMode 129 if ((!MID.mayStore() && !MID.mayLoad()) || HII->isPredicated(MI)) in INITIALIZE_PASS_DEPENDENCY() 138 if (HII->getAddrMode(MI) == HexagonII::BaseRegOffset) in INITIALIZE_PASS_DEPENDENCY() 140 return (HII->changeAddrMode_rr_ur(MI) >= 0); in INITIALIZE_PASS_DEPENDENCY() 141 else if (HII->getAddrMode(MI) == HexagonII::BaseImmOffset) in INITIALIZE_PASS_DEPENDENCY() 143 return (HII->changeAddrMode_io_abs(MI) >= 0); in INITIALIZE_PASS_DEPENDENCY() 196 HII->getAddrMode(UseMI) != HexagonII::BaseImmOffset || in canRemoveAddasl() 326 switch (HII->getMemAccessSize(*MI)) { in isValidOffset() 345 return HII->isValidOffset(MI->getOpcode(), Offset, HRI, false); in isValidOffset() 359 HII->getAddrMode(*MI) != HexagonII::BaseImmOffset || in processAddUses() [all …]
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D | HexagonFrameLowering.cpp | 591 auto &HII = *HST.getInstrInfo(); in insertPrologueInBlock() local 622 expandAlloca(MI, HII, SP, MaxCF); in insertPrologueInBlock() 638 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_addi), SP) in insertPrologueInBlock() 704 BuildMI(MBB, InsertPt, dl, HII.get(LDOpc), RegUsed) in insertPrologueInBlock() 711 BuildMI(MBB, InsertPt, dl, HII.get(STOpc)) in insertPrologueInBlock() 731 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::S2_storeri_io)) in insertPrologueInBlock() 743 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_andir), SP) in insertPrologueInBlock() 751 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::PS_call_stk)) in insertPrologueInBlock() 755 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_addi), SP) in insertPrologueInBlock() 764 auto &HII = *HST.getInstrInfo(); in insertEpilogueInBlock() local [all …]
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D | HexagonFrameLowering.h | 135 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 138 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 141 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 144 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 147 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 150 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 153 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 156 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 159 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
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D | HexagonVExtract.cpp | 55 const HexagonInstrInfo *HII = nullptr; member in __anon9e9215aa0111::HexagonVExtract 83 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L2_loadri_io), ElemR) in genElemLoad() 91 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::A2_andir), IdxR) in genElemLoad() 94 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L4_loadri_rr), ElemR) in genElemLoad() 103 HII = HST->getInstrInfo(); in runOnMachineFunction() 127 auto MIB = BuildMI(BB, At, dl, HII->get(FiOpc), AddrR); in runOnMachineFunction() 156 BuildMI(DefB, At, DefI->getDebugLoc(), HII->get(StoreOpc)) in runOnMachineFunction()
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D | HexagonConstExtenders.cpp | 381 const HexagonInstrInfo *HII = nullptr; member 873 const MCInstrDesc &D = HII->get(ExtOpc); in getRegOffOpcode() 1051 if (!isRegOffOpcode(Opc) || HII->isConstExtended(MI)) in getOffsetRange() 1063 if (HII->isPostIncrement(MI)) in getOffsetRange() 1066 const MCInstrDesc &D = HII->get(Opc); in getOffsetRange() 1070 if (!HII->getBaseAndOffsetPosition(MI, BaseP, OffP) || in getOffsetRange() 1114 const MCInstrDesc &D = HII->get(IdxOpc); in getOffsetRange() 1156 unsigned AM = HII->getAddrMode(MI); in recordExtender() 1228 if (!HII->isConstExtended(MI)) in collectInstr() 1241 recordExtender(MI, HII->getCExtOpNum(MI)); in collectInstr() [all …]
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D | HexagonExpandCondsets.cpp | 165 const HexagonInstrInfo *HII = nullptr; member in __anona70c8e5c0111::HexagonExpandCondsets 344 if (HII->isPredicated(*DefI)) in updateKillFlags() 422 if (HII->isPredicated(*DefI)) in updateDeadsInRange() 492 if (!HII->isPredicated(*DefI)) in updateDeadsInRange() 647 MIB = BuildMI(B, At, DL, HII->get(Opc)) in genCondTfrFor() 652 MIB = BuildMI(B, At, DL, HII->get(Opc)) in genCondTfrFor() 696 MI.setDesc(HII->get(TargetOpcode::COPY)); in split() 724 if (HII->isPredicated(*MI) || !HII->isPredicable(*MI)) in isPredicable() 759 if (PredValid && HII->isPredicated(*MI)) { in getReachingDefForPred() 760 if (MI->readsRegister(PredR) && (Cond != HII->isPredicatedTrue(*MI))) in getReachingDefForPred() [all …]
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D | HexagonBitSimplify.cpp | 224 uint16_t Begin, const HexagonInstrInfo &HII); 624 BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) { in getUsedBits() argument 627 const MCInstrDesc &D = HII.get(Opc); in getUsedBits() 955 : MF(mf), HII(*MF.getSubtarget<HexagonSubtarget>().getInstrInfo()), in DeadCodeElimination() 967 const HexagonInstrInfo &HII; member in __anoncd76e3a50411::DeadCodeElimination 1055 : Transformation(true), HII(hii), HRI(hri), MRI(mri), BT(bt) {} in RedundantInstrElimination() 1069 const HexagonInstrInfo &HII; member in __anoncd76e3a50511::RedundantInstrElimination 1254 bool GotBits = HBS::getUsedBits(Opc, OpN, T, Begin, HII); in computeUsedBits() 1349 BuildMI(B, At, DL, HII.get(TargetOpcode::COPY), NewR) in processBlock() 1378 : Transformation(true), HII(hii), MRI(mri), BT(bt) {} in ConstGeneration() [all …]
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonVLIWPacketizer.cpp | 88 const HexagonInstrInfo *HII; member in __anon637f1d3f0111::HexagonPacketizer 109 HII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); in INITIALIZE_PASS_DEPENDENCY() 177 HII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); in runOnMachineFunction() 184 HII->genAllInsnTimingClasses(MF); in runOnMachineFunction() 222 while (RB != End && HII->isSchedulingBoundary(*RB, &MB, MF)) in runOnMachineFunction() 227 while (RE != End && !HII->isSchedulingBoundary(*RE, &MB, MF)) in runOnMachineFunction() 259 auto *ExtMI = MF.CreateMachineInstr(HII->get(Hexagon::A4_ext), DebugLoc()); in tryAllocateResourcesForConstExt() 274 if (HII->isDeallocRet(MI)) in isCallDependent() 284 if (HII->isIndirectCall(MI) && (DepType == SDep::Data)) { in isCallDependent() 329 return HII->isCondInst(MI) || MI->isReturn() || HII->mayBeNewStore(MI); in isNewifiable() [all …]
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D | HexagonBranchRelaxation.cpp | 57 const HexagonInstrInfo *HII; member 84 HII = HST.getInstrInfo(); in runOnMachineFunction() 107 InstOffset += HII->getSize(&MI); in computeOffset() 145 InstOffset += HII->nonDbgBBSize(&B) * HEXAGON_INSTR_SIZE; in isJumpOutOfRange() 151 if (HII->analyzeBranch(B, TBB, FBB, Cond, false)) { in isJumpOutOfRange() 155 if (HII->isNewValueJump(&*FirstTerm)) in isJumpOutOfRange() 156 TBB = FirstTerm->getOperand(HII->getCExtOpNum(&*FirstTerm)).getMBB(); in isJumpOutOfRange() 161 return !HII->isJumpWithinBranchRange(&*FirstTerm, Distance); in isJumpOutOfRange() 174 return !HII->isJumpWithinBranchRange(&*SecondTerm, Distance); in isJumpOutOfRange() 189 << HII->isExtendable(&MI) << ") isConstExtended(" in reGenerateBranch() [all …]
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D | HexagonOptAddrMode.cpp | 51 : MachineFunctionPass(ID), HII(0), MDT(0), DFG(0), LV(0) { in HexagonOptAddrMode() 69 const HexagonInstrInfo *HII; member in __anon0d7b86be0111::HexagonOptAddrMode 110 if ((!MID.mayStore() && !MID.mayLoad()) || HII->isPredicated(*MI)) in INITIALIZE_PASS_DEPENDENCY() 119 if (HII->getAddrMode(MI) == HexagonII::BaseRegOffset) in INITIALIZE_PASS_DEPENDENCY() 121 return (HII->getBaseWithLongOffset(MI) >= 0); in INITIALIZE_PASS_DEPENDENCY() 122 else if (HII->getAddrMode(MI) == HexagonII::BaseImmOffset) in INITIALIZE_PASS_DEPENDENCY() 124 return (HII->getAbsoluteForm(MI) >= 0); in INITIALIZE_PASS_DEPENDENCY() 174 HII->getAddrMode(UseMI) != HexagonII::BaseImmOffset || in canRemoveAddasl() 316 if (HII->getAddrMode(OldMI) == HexagonII::BaseRegOffset) { in changeLoad() 317 short NewOpCode = HII->getBaseWithLongOffset(OldMI); in changeLoad() [all …]
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D | HexagonFrameLowering.cpp | 499 auto &HII = *HST.getInstrInfo(); in insertPrologueInBlock() local 528 expandAlloca(MI, HII, SP, MaxCF); in insertPrologueInBlock() 547 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::S2_allocframe)) in insertPrologueInBlock() 554 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::CONST32_Int_Real), in insertPrologueInBlock() 556 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_sub), SP) in insertPrologueInBlock() 560 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::S2_allocframe)) in insertPrologueInBlock() 566 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_andir), SP) in insertPrologueInBlock() 575 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::CALLstk)) in insertPrologueInBlock() 585 auto &HII = *HST.getInstrInfo(); in insertEpilogueInBlock() local 601 BuildMI(MBB, InsertPt, DL, HII.get(Hexagon::L2_deallocframe)); in insertEpilogueInBlock() [all …]
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D | HexagonFrameLowering.h | 102 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 105 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 108 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 111 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 114 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 117 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 120 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 123 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 126 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
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D | HexagonExpandCondsets.cpp | 181 MachineFunctionPass(ID), HII(0), TRI(0), MRI(0), in HexagonExpandCondsets() 205 const HexagonInstrInfo *HII; member in __anonceba9f4e0111::HexagonExpandCondsets 372 if (HII->isPredicated(*DefI)) in updateKillFlags() 460 if (HII->isPredicated(*DefI)) in updateDeadsInRange() 512 if (!HII->isPredicated(*DefI)) in updateDeadsInRange() 627 MachineInstrBuilder MIB = BuildMI(B, At, DL, HII->get(Opc)) in genCondTfrFor() 677 auto ImpD = BuildMI(B, DefAt, DL, HII->get(TargetOpcode::IMPLICIT_DEF)) in split() 719 if (HII->isPredicated(*MI) || !HII->isPredicable(*MI)) in isPredicable() 755 if (PredValid && HII->isPredicated(*MI)) { in getReachingDefForPred() 756 if (MI->readsRegister(PredR) && (Cond != HII->isPredicatedTrue(*MI))) in getReachingDefForPred() [all …]
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D | HexagonBitSimplify.cpp | 179 uint16_t Begin, const HexagonInstrInfo &HII); 575 BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) { in getUsedBits() argument 578 const MCInstrDesc &D = HII.get(Opc); in getUsedBits() 901 : MF(mf), HII(*MF.getSubtarget<HexagonSubtarget>().getInstrInfo()), in DeadCodeElimination() 913 const HexagonInstrInfo &HII; member in __anon3f9b49d70411::DeadCodeElimination 1003 : Transformation(true), HII(hii), MRI(mri), BT(bt) {} in RedundantInstrElimination() 1015 const HexagonInstrInfo &HII; member in __anon3f9b49d70511::RedundantInstrElimination 1200 bool GotBits = HBS::getUsedBits(Opc, OpN, T, Begin, HII); in computeUsedBits() 1295 BuildMI(B, At, DL, HII.get(TargetOpcode::COPY), NewR) in processBlock() 1318 : Transformation(true), HII(hii), MRI(mri), BT(bt) {} in ConstGeneration() [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonVLIWPacketizer.cpp | 115 const HexagonInstrInfo *HII = nullptr; member in __anonaa7ebf610111::HexagonPacketizer 138 HII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); in INITIALIZE_PASS_DEPENDENCY() 207 HII = HST.getInstrInfo(); in runOnMachineFunction() 214 HII->genAllInsnTimingClasses(MF); in runOnMachineFunction() 252 while (RB != End && HII->isSchedulingBoundary(*RB, &MB, MF)) in runOnMachineFunction() 257 while (RE != End && !HII->isSchedulingBoundary(*RE, &MB, MF)) in runOnMachineFunction() 288 auto *ExtMI = MF.CreateMachineInstr(HII->get(Hexagon::A4_ext), DebugLoc()); in tryAllocateResourcesForConstExt() 302 if (HII->isDeallocRet(MI)) in isCallDependent() 358 if (HII->isHVXVec(MI) && MI.mayStore()) in isNewifiable() 360 return HII->isPredicated(MI) && HII->getDotNewPredOp(MI, nullptr) > 0; in isNewifiable() [all …]
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D | HexagonBranchRelaxation.cpp | 68 const HexagonInstrInfo *HII; member 95 HII = HST.getInstrInfo(); in runOnMachineFunction() 116 InstOffset += HII->getSize(MI); in computeOffset() 118 if (MI.isBranch() && HII->isExtendable(MI)) in computeOffset() 150 if (HII->isExtended(MI)) in isJumpOutOfRange() 159 InstOffset += HII->nonDbgBBSize(&B) * HEXAGON_INSTR_SIZE; in isJumpOutOfRange() 165 if (HII->analyzeBranch(B, TBB, FBB, Cond, false)) { in isJumpOutOfRange() 169 if (HII->isNewValueJump(*FirstTerm)) in isJumpOutOfRange() 170 TBB = FirstTerm->getOperand(HII->getCExtOpNum(*FirstTerm)).getMBB(); in isJumpOutOfRange() 175 return !HII->isJumpWithinBranchRange(*FirstTerm, Distance); in isJumpOutOfRange() [all …]
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D | HexagonOptAddrMode.cpp | 83 const HexagonInstrInfo *HII = nullptr; member in __anoned078c200111::HexagonOptAddrMode 129 if ((!MID.mayStore() && !MID.mayLoad()) || HII->isPredicated(MI)) in INITIALIZE_PASS_DEPENDENCY() 138 if (HII->getAddrMode(MI) == HexagonII::BaseRegOffset) in INITIALIZE_PASS_DEPENDENCY() 140 return (HII->changeAddrMode_rr_ur(MI) >= 0); in INITIALIZE_PASS_DEPENDENCY() 141 else if (HII->getAddrMode(MI) == HexagonII::BaseImmOffset) in INITIALIZE_PASS_DEPENDENCY() 143 return (HII->changeAddrMode_io_abs(MI) >= 0); in INITIALIZE_PASS_DEPENDENCY() 196 HII->getAddrMode(UseMI) != HexagonII::BaseImmOffset || in canRemoveAddasl() 326 switch (HII->getMemAccessSize(*MI)) { in isValidOffset() 345 return HII->isValidOffset(MI->getOpcode(), Offset, HRI, false); in isValidOffset() 359 HII->getAddrMode(*MI) != HexagonII::BaseImmOffset || in processAddUses() [all …]
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D | HexagonFrameLowering.cpp | 588 auto &HII = *HST.getInstrInfo(); in insertPrologueInBlock() local 619 expandAlloca(MI, HII, SP, MaxCF); in insertPrologueInBlock() 628 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_andir), SP) in insertPrologueInBlock() 636 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::PS_call_stk)) in insertPrologueInBlock() 640 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_addi), SP) in insertPrologueInBlock() 649 auto &HII = *HST.getInstrInfo(); in insertEpilogueInBlock() local 659 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_addi), SP) in insertEpilogueInBlock() 671 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::L2_deallocframe)) in insertEpilogueInBlock() 674 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::A2_add), SP) in insertEpilogueInBlock() 719 BuildMI(MBB, InsertPt, dl, HII.get(Hexagon::L2_deallocframe)) in insertEpilogueInBlock() [all …]
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D | HexagonFrameLowering.h | 129 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 132 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 135 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 138 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 141 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 144 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 147 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 150 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 153 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
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D | HexagonVExtract.cpp | 55 const HexagonInstrInfo *HII = nullptr; member in __anon510c09be0111::HexagonVExtract 83 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L2_loadri_io), ElemR) in genElemLoad() 91 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::A2_andir), IdxR) in genElemLoad() 94 BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L4_loadri_rr), ElemR) in genElemLoad() 103 HII = HST->getInstrInfo(); in runOnMachineFunction() 127 auto MIB = BuildMI(BB, At, dl, HII->get(FiOpc), AddrR); in runOnMachineFunction() 156 BuildMI(DefB, At, DefI->getDebugLoc(), HII->get(StoreOpc)) in runOnMachineFunction()
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D | HexagonExpandCondsets.cpp | 165 const HexagonInstrInfo *HII = nullptr; member in __anon15ba41700111::HexagonExpandCondsets 343 if (HII->isPredicated(*DefI)) in updateKillFlags() 421 if (HII->isPredicated(*DefI)) in updateDeadsInRange() 491 if (!HII->isPredicated(*DefI)) in updateDeadsInRange() 646 MIB = BuildMI(B, At, DL, HII->get(Opc)) in genCondTfrFor() 651 MIB = BuildMI(B, At, DL, HII->get(Opc)) in genCondTfrFor() 695 MI.setDesc(HII->get(TargetOpcode::COPY)); in split() 723 if (HII->isPredicated(*MI) || !HII->isPredicable(*MI)) in isPredicable() 758 if (PredValid && HII->isPredicated(*MI)) { in getReachingDefForPred() 759 if (MI->readsRegister(PredR) && (Cond != HII->isPredicatedTrue(*MI))) in getReachingDefForPred() [all …]
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D | HexagonBitSimplify.cpp | 224 uint16_t Begin, const HexagonInstrInfo &HII); 622 BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) { in getUsedBits() argument 625 const MCInstrDesc &D = HII.get(Opc); in getUsedBits() 954 : MF(mf), HII(*MF.getSubtarget<HexagonSubtarget>().getInstrInfo()), in DeadCodeElimination() 966 const HexagonInstrInfo &HII; member in __anon1f274f390411::DeadCodeElimination 1054 : Transformation(true), HII(hii), HRI(hri), MRI(mri), BT(bt) {} in RedundantInstrElimination() 1068 const HexagonInstrInfo &HII; member in __anon1f274f390511::RedundantInstrElimination 1253 bool GotBits = HBS::getUsedBits(Opc, OpN, T, Begin, HII); in computeUsedBits() 1348 BuildMI(B, At, DL, HII.get(TargetOpcode::COPY), NewR) in processBlock() 1377 : Transformation(true), HII(hii), MRI(mri), BT(bt) {} in ConstGeneration() [all …]
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D | HexagonConstExtenders.cpp | 382 const HexagonInstrInfo *HII = nullptr; member 874 const MCInstrDesc &D = HII->get(ExtOpc); in getRegOffOpcode() 1052 if (!isRegOffOpcode(Opc) || HII->isConstExtended(MI)) in getOffsetRange() 1064 if (HII->isPostIncrement(MI)) in getOffsetRange() 1067 const MCInstrDesc &D = HII->get(Opc); in getOffsetRange() 1071 if (!HII->getBaseAndOffsetPosition(MI, BaseP, OffP) || in getOffsetRange() 1115 const MCInstrDesc &D = HII->get(IdxOpc); in getOffsetRange() 1157 unsigned AM = HII->getAddrMode(MI); in recordExtender() 1229 if (!HII->isConstExtended(MI)) in collectInstr() 1242 recordExtender(MI, HII->getCExtOpNum(MI)); in collectInstr() [all …]
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