| /external/libhevc/common/arm/ |
| D | ihevc_sao_band_offset_chroma.s | 133 …VADD.I8 D5,D1,D31 @band_table_u.val[0] = vadd_u8(band_table_u.val[0], sao_ba…
136 …VADD.I8 D6,D2,D31 @band_table_u.val[1] = vadd_u8(band_table_u.val[1], sao_ba…
139 …VADD.I8 D7,D3,D31 @band_table_u.val[2] = vadd_u8(band_table_u.val[2], sao_ba…
142 …VADD.I8 D8,D4,D31 @band_table_u.val[3] = vadd_u8(band_table_u.val[3], sao_ba…
150 VMOV.I8 D30,#16 @vdup_n_u8(16)
151 …VADD.I8 D1,D5,D29 @band_table_u.val[0] = vadd_u8(band_table_u.val[0], vdup_n…
154 …VADD.I8 D2,D6,D28 @band_table_u.val[1] = vadd_u8(band_table_u.val[1], vdup_n…
157 …VADD.I8 D3,D7,D27 @band_table_u.val[2] = vadd_u8(band_table_u.val[2], vdup_n…
160 …VADD.I8 D4,D8,D26 @band_table_u.val[3] = vadd_u8(band_table_u.val[3], vdup_n…
213 …VADD.I8 D13,D9,D30 @band_table_v.val[0] = vadd_u8(band_table_v.val[0], band_p…
[all …]
|
| D | ihevc_sao_band_offset_luma.s | 125 … VADD.I8 D5,D1,D31 @band_table.val[0] = vadd_u8(band_table.val[0], band_pos)
128 … VADD.I8 D6,D2,D31 @band_table.val[1] = vadd_u8(band_table.val[1], band_pos)
131 … VADD.I8 D7,D3,D31 @band_table.val[2] = vadd_u8(band_table.val[2], band_pos)
134 … VADD.I8 D8,D4,D31 @band_table.val[3] = vadd_u8(band_table.val[3], band_pos)
137 …VADD.I8 D1,D5,D29 @band_table.val[0] = vadd_u8(band_table.val[0], vdup_n_u8(…
139 VMOV.I8 D29,#16 @vdup_n_u8(16)
140 …VADD.I8 D2,D6,D28 @band_table.val[1] = vadd_u8(band_table.val[1], vdup_n_u8(…
143 …VADD.I8 D3,D7,D27 @band_table.val[2] = vadd_u8(band_table.val[2], vdup_n_u8(…
145 …VADD.I8 D4,D8,D26 @band_table.val[3] = vadd_u8(band_table.val[3], vdup_n_u8(…
207 VSUB.I8 D14,D13,D31 @vsub_u8(au1_cur_row, band_pos)
[all …]
|
| D | ihevc_sao_edge_offset_class0.s | 88 VMOV.I8 Q1,#2 @const_2 = vdupq_n_s8(2)
175 … VSUB.I8 Q10,Q9,Q8 @sign_left = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt))
202 …VSUB.I8 Q11,Q9,Q8 @sign_right = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt))
205 VADD.I8 Q7,Q1,Q10 @edge_idx = vaddq_s8(const_2, sign_left)
208 VADD.I8 Q7,Q7,Q11 @edge_idx = vaddq_s8(edge_idx, sign_right)
211 …VSUB.I8 Q10,Q0,Q15 @II sign_left = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_g…
217 …VSUB.I8 Q11,Q0,Q15 @II sign_right = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_…
223 VADD.I8 Q14,Q1,Q10 @II edge_idx = vaddq_s8(const_2, sign_left)
224 VADD.I8 Q14,Q14,Q11 @II edge_idx = vaddq_s8(edge_idx, sign_right)
309 … VSUB.I8 Q10,Q9,Q8 @sign_left = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt))
[all …]
|
| D | ihevc_sao_edge_offset_class1.s | 115 VMOV.I8 Q0,#2 @const_2 = vdupq_n_s8(2)
168 VADD.I8 Q6,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
171 VADD.I8 Q6,Q6,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
180 VADD.I8 Q11,Q0,Q8 @II edge_idx = vaddq_s8(const_2, sign_up)
185 VADD.I8 Q11,Q11,Q4 @II edge_idx = vaddq_s8(edge_idx, sign_down)
241 VADD.I8 Q11,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
242 VADD.I8 Q11,Q11,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
310 VADD.I8 Q6,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
313 VADD.I8 Q6,Q6,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
320 VADD.I8 Q11,Q0,Q8 @II edge_idx = vaddq_s8(const_2, sign_up)
[all …]
|
| D | ihevc_sao_edge_offset_class1_chroma.s | 118 VMOV.I8 Q0,#2 @const_2 = vdupq_n_s8(2)
172 VADD.I8 Q6,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
175 VADD.I8 Q6,Q6,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
184 VADD.I8 Q11,Q0,Q8 @II edge_idx = vaddq_s8(const_2, sign_up)
190 VADD.I8 Q11,Q11,Q14 @II edge_idx = vaddq_s8(edge_idx, sign_down)
253 VADD.I8 Q11,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
254 VADD.I8 Q11,Q11,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
327 VADD.I8 Q6,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
330 VADD.I8 Q6,Q6,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
339 VADD.I8 Q11,Q0,Q8 @II edge_idx = vaddq_s8(const_2, sign_up)
[all …]
|
| /external/llvm-project/llvm/test/Transforms/MemCpyOpt/ |
| D | memcpy-to-memset.ll | 11 ; CHECK-NEXT: [[I8:%.*]] = bitcast i32* [[A]] to i8*
12 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[I8]], i8 undef, i64 4, i1 false)
25 ; CHECK-NEXT: [[I8:%.*]] = bitcast [3 x i32]* [[A]] to i8*
26 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[I8]], i8 -1, i64 12, i1 false)
39 ; CHECK-NEXT: [[I8:%.*]] = bitcast [3 x i32]* [[A]] to i8*
40 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[I8]], i8 -1, i64 12, i1 false)
54 ; CHECK-NEXT: [[I8:%.*]] = bitcast %struct.bitfield* [[A]] to i8*
55 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[I8]], i8 -86, i64 4, i1 false)
68 ; CHECK-NEXT: [[I8:%.*]] = bitcast <16 x i1>* [[A]] to i8*
69 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[I8]], i8 0, i64 16, i1 false)
[all …]
|
| /external/llvm-project/flang/test/Semantics/ |
| D | io07.f90 | 7 2001 format(3I8, 3Z8)
8 2002 format(3I8, Z8)
38 2103 format(3I8 3Z8)
41 2104 format(3I8 Z8)
|
| /external/webp/src/dsp/ |
| D | mips_macro.h | 42 I0, I1, I2, I3, I4, I5, I6, I7, I8, I9) \ argument
46 "ulw %[" #O3 "], " #I4 "+" XSTR(I9) "*" #I8 "(%[" #I0 "]) \n\t"
162 I8, I9, I10, I11, I12, I13) \ argument
183 "usw %[" #IO0 "], " XSTR(I13) "*" #I9 "(%[" #I8 "]) \n\t" \
184 "usw %[" #IO2 "], " XSTR(I13) "*" #I10 "(%[" #I8 "]) \n\t" \
185 "usw %[" #IO4 "], " XSTR(I13) "*" #I11 "(%[" #I8 "]) \n\t" \
186 "usw %[" #IO6 "], " XSTR(I13) "*" #I12 "(%[" #I8 "]) \n\t"
|
| /external/libhevc/decoder/arm/ |
| D | ihevcd_fmt_conv_420sp_to_rgba8888.s | 176 @VMOV.I8 Q1,#128
230 VMOV.I8 D17,#0
240 VMOV.I8 D23,#0
281 VMOV.I8 D17,#0
291 VMOV.I8 D23,#0
313 @VMOV.I8 Q1,#128
361 VMOV.I8 D17,#0
371 VMOV.I8 D23,#0
403 VMOV.I8 D17,#0
413 VMOV.I8 D23,#0
|
| /external/rust/crates/bindgen/src/ir/ |
| D | int.rs | 49 I8, enumerator
99 SChar | Short | Int | Long | LongLong | I8 | I16 | I32 | I64 | in is_signed()
114 Bool | UChar | SChar | U8 | I8 | Char { .. } => 1, in known_size()
|
| /external/llvm-project/clang-tools-extra/test/clang-tidy/checkers/ |
| D | readability-uppercase-literal-suffix-integer-ms.cpp | 72 static_assert(v9 == 1I8, ""); in integer_suffix()
74 static constexpr auto v10 = 1I8; // OK. in integer_suffix()
76 static_assert(v10 == 1I8, ""); in integer_suffix()
|
| /external/llvm-project/llvm/unittests/Analysis/ |
| D | BasicAliasAnalysisTest.cpp | 115 AllocaInst *I8 = B.CreateAlloca(B.getInt8Ty(), B.getInt32(2)); in TEST_F() local
117 cast<GetElementPtrInst>(B.CreateGEP(B.getInt8Ty(), I8, ArbitraryI32)); in TEST_F()
123 MemoryLocation(I8, LocationSize::precise(2)), in TEST_F()
129 MemoryLocation(I8, LocationSize::upperBound(2)), in TEST_F()
|
| /external/llvm-project/llvm/test/Transforms/Reassociate/ |
| D | load-combine-like-or.ll | 14 ; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], 42
15 ; CHECK-NEXT: ret i16 [[I8]]
38 ; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], 42
39 ; CHECK-NEXT: ret i16 [[I8]]
62 ; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], 42
63 ; CHECK-NEXT: ret i16 [[I8]]
142 ; CHECK-NEXT: [[I8:%.*]] = add i16 [[I7]], [[I6]]
143 ; CHECK-NEXT: ret i16 [[I8]]
|
| /external/rust/cxx/syntax/ |
| D | atom.rs | 14 I8, enumerator
40 "i8" => Some(I8), in from_str()
71 I8 => "i8", in as_ref()
|
| /external/llvm-project/llvm/test/Transforms/GVN/ |
| D | loadpre-missed-opportunity.ll | 12 ; PRE-NEXT: [[I8:%.*]] = phi i32* [ [[I8_PRE:%.*]], [[BB17_BB7_CRIT_EDGE:%.*]] ], [ [[I81:%.*]],…
13 ; PRE-NEXT: [[I10:%.*]] = call i32 @use(i32* [[I8]])
16 ; PRE-NEXT: [[I81]] = phi i32* [ [[I]], [[BB:%.*]] ], [ [[I8]], [[BB7:%.*]] ]
43 ; CHECK-NEXT: [[I8:%.*]] = load i32*, i32** [[ARG]], align 8
44 ; CHECK-NEXT: [[I10:%.*]] = call i32 @use(i32* [[I8]])
|
| /external/llvm-project/llvm/test/MC/AMDGPU/ |
| D | hsa-metadata-unknown-key.s | 22 ValueType: I8
40 ValueType: I8
|
| D | hsa-metadata-kernel-args.s | 51 ValueType: I8
68 ValueType: I8
|
| /external/llvm-project/llvm/test/Transforms/IndVarSimplify/X86/ |
| D | pr45360.ll | 27 ; CHECK-NEXT: [[I8_LCSSA9:%.*]] = phi i32 [ [[D_PROMOTED8]], [[BB:%.*]] ], [ [[I8:%.*]], [[BB27:…
28 ; CHECK-NEXT: [[I8]] = and i32 [[I8_LCSSA9]], [[I6]]
29 ; CHECK-NEXT: [[I21:%.*]] = icmp eq i32 [[I8]], 0
37 ; CHECK-NEXT: [[I26:%.*]] = urem i32 [[I24]], [[I8]]
43 ; CHECK-NEXT: store i32 [[I8]], i32* @d, align 4
|
| /external/tensorflow/tensorflow/compiler/mlir/lite/ir/ |
| D | tfl_ops.td | 691 ins TFL_TensorOf<[F32, I32, I8, UI8, QI8, QUI8]>:$input,
721 ins TFL_TensorOf<[F32, I32, I8, UI8, QI8, QUI8]>:$input,
770 [F32, I64, I32, I16, I8, QI8, QUI8, UI8, I1]>:$values,
777 [F32, I64, I32, I16, I8, QI8, QUI8, UI8, I1]>:$output
1050 TFL_TensorOf<[F32, I1, I8, I32, I64, TFL_Str, UI8, QI8, QUI8, QI16]>:$params,
1062 TFL_TensorOf<[F32, I1, I8, I32, I64, TFL_Str, UI8, QI8, QUI8, QI16]>:$output
1079 TFL_TensorOf<[F32, I8, I16, I64, I32, UI8, TFL_Str]>:$params,
1084 TFL_TensorOf<[F32, I8, I16, I64, I32, UI8, TFL_Str]>:$output
1103 TFL_TensorOf<[F32, I8, I64, I32, UI8]>:$updates,
1108 TFL_TensorOf<[F32, I8, I64, I32, UI8]>:$output
[all …]
|
| /external/flatbuffers/tests/MyGame/Example/ |
| D | TypeAliases.cs | 22 …public sbyte I8 { get { int o = __p.__offset(4); return o != 0 ? __p.bb.GetSbyte(o + __p.bb_pos) :… property
119 _o.I8 = this.I8; in UnPackTo()
148 _o.I8, in Pack()
166 public sbyte I8 { get; set; } property in MyGame.Example.TypeAliasesT
191 this.I8 = 0; in TypeAliasesT()
|
| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | pr42909.ll | 13 %I8 = insertelement <4 x i16> zeroinitializer, i16 %L5, i32 1
14 %Tr = trunc <4 x i16> %I8 to <4 x i1>
|
| /external/llvm-project/llvm/test/CodeGen/SystemZ/ |
| D | copy-physreg-128.ll | 10 %I8 = insertelement <8 x i64> undef, i64 %1, i32 3
15 %B29 = urem <8 x i64> %I8, %I21
38 %B155 = udiv <8 x i64> %I8, %I139
|
| /external/google-java-format/core/src/test/resources/com/google/googlejavaformat/java/testdata/ |
| D | I.input | 26 interface I8 {}
52 I0 & I1 & I2 & I3 & I4 & I5 & I6 & I7 & I8 & I9 & I10 & I11 & I12 & I13 & I14 & I15 & I16
|
| D | I.output | 26 interface I8 {}
52 I0 & I1 & I2 & I3 & I4 & I5 & I6 & I7 & I8 & I9 & I10 & I11 & I12 & I13 & I14 & I15 & I16
|
| /external/llvm-project/llvm/test/CodeGen/Mips/msa/ |
| D | llvm-stress-s525530439.ll | 29 %I8 = insertelement <4 x i32> zeroinitializer, i32 %3, i32 3
49 …%Shuff21 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %I8, <4 x i32> <i32 undef, i32 2, i3…
107 …%Shuff55 = shufflevector <4 x i32> %Shuff21, <4 x i32> %I8, <4 x i32> <i32 4, i32 6, i32 undef, i3…
115 …%Shuff61 = shufflevector <4 x i32> %I8, <4 x i32> %I8, <4 x i32> <i32 undef, i32 1, i32 undef, i32…
127 …%Shuff68 = shufflevector <4 x i32> %Sl64, <4 x i32> %I8, <4 x i32> <i32 5, i32 undef, i32 1, i32 u…
|