Searched refs:ID_SHIFT_ (Results 1 – 13 of 13) sorted by relevance
142 ID_SHIFT_ = 0, enumerator144 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_)187 ID_SHIFT_ = 0, enumerator189 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_)
273 ID_SHIFT_ = 0, enumerator275 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_)337 ID_SHIFT_ = 0, enumerator339 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_)
202 (AMDGPU::Hwreg::ID_MODE << AMDGPU::Hwreg::ID_SHIFT_)); in insertSetreg()246 if (((Dst & AMDGPU::Hwreg::ID_MASK_) >> AMDGPU::Hwreg::ID_SHIFT_) != in processBlockPhase1()
1200 AMDGPU::Hwreg::ID_MEM_BASES << AMDGPU::Hwreg::ID_SHIFT_ | in getSegmentAperture()
4684 AMDGPU::Hwreg::ID_MEM_BASES << AMDGPU::Hwreg::ID_SHIFT_ | in getSegmentAperture()
278 ID_SHIFT_ = 0, enumerator280 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_)344 ID_SHIFT_ = 0, enumerator346 ID_MASK_ = (((1 << ID_WIDTH_) - 1) << ID_SHIFT_)
206 (AMDGPU::Hwreg::ID_MODE << AMDGPU::Hwreg::ID_SHIFT_)); in insertSetreg()253 if (((Dst & AMDGPU::Hwreg::ID_MASK_) >> AMDGPU::Hwreg::ID_SHIFT_) != in processBlockPhase1()
1727 AMDGPU::Hwreg::ID_MEM_BASES << AMDGPU::Hwreg::ID_SHIFT_ | in getSegmentAperture()
5266 AMDGPU::Hwreg::ID_MEM_BASES << AMDGPU::Hwreg::ID_SHIFT_ | in getSegmentAperture()
747 return (Id << ID_SHIFT_) | in encodeHwreg()757 Id = (Val & ID_MASK_) >> ID_SHIFT_; in decodeHwreg()870 return (MsgId << ID_SHIFT_) | in encodeMsg()
795 return (Id << ID_SHIFT_) | in encodeHwreg()805 Id = (Val & ID_MASK_) >> ID_SHIFT_; in decodeHwreg()1016 return (MsgId << ID_SHIFT_) | in encodeMsg()
865 const unsigned Id = (SImm16 & ID_MASK_) >> ID_SHIFT_; in printHwreg()
1888 … Imm16Val = (HwReg.Id << ID_SHIFT_) | (Offset << OFFSET_SHIFT_) | ((Width-1) << WIDTH_M1_SHIFT_); in parseHwreg()2036 Imm16Val = (Msg.Id << ID_SHIFT_); in parseSendMsgOp()