Searched refs:Imm6 (Results 1 – 6 of 6) sorted by relevance
/external/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
D | HexagonAsmParser.cpp | 1632 MCOperand &Imm6 = Inst.getOperand(4); in processInstruction() local 1633 Imm6.setExpr(HexagonMCExpr::create( in processInstruction() 1634 MCBinaryExpr::createSub(Imm6.getExpr(), in processInstruction() 1642 TmpInst.addOperand(Imm6); in processInstruction() 1652 MCOperand &Imm6 = Inst.getOperand(4); in processInstruction() local 1653 Imm6.setExpr(HexagonMCExpr::create( in processInstruction() 1654 MCBinaryExpr::createSub(Imm6.getExpr(), in processInstruction() 1662 TmpInst.addOperand(Imm6); in processInstruction() 1672 MCOperand &Imm6 = Inst.getOperand(4); in processInstruction() local 1673 Imm6.setExpr(HexagonMCExpr::create( in processInstruction() [all …]
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/AsmParser/ |
D | HexagonAsmParser.cpp | 1620 MCOperand &Imm6 = Inst.getOperand(4); in processInstruction() local 1621 Imm6.setExpr(HexagonMCExpr::create( in processInstruction() 1622 MCBinaryExpr::createSub(Imm6.getExpr(), in processInstruction() 1630 TmpInst.addOperand(Imm6); in processInstruction() 1640 MCOperand &Imm6 = Inst.getOperand(4); in processInstruction() local 1641 Imm6.setExpr(HexagonMCExpr::create( in processInstruction() 1642 MCBinaryExpr::createSub(Imm6.getExpr(), in processInstruction() 1650 TmpInst.addOperand(Imm6); in processInstruction() 1660 MCOperand &Imm6 = Inst.getOperand(4); in processInstruction() local 1661 Imm6.setExpr(HexagonMCExpr::create( in processInstruction() [all …]
|
/external/llvm/lib/Target/Hexagon/AsmParser/ |
D | HexagonAsmParser.cpp | 1846 MCOperand &Imm6 = Inst.getOperand(4); in processInstruction() local 1847 Imm6.setExpr(HexagonMCExpr::create(MCBinaryExpr::createSub( in processInstruction() 1848 Imm6.getExpr(), MCConstantExpr::create(1, Context), Context), Context)); in processInstruction() 1854 TmpInst.addOperand(Imm6); in processInstruction() 1865 MCOperand &Imm6 = Inst.getOperand(4); in processInstruction() local 1866 Imm6.setExpr(HexagonMCExpr::create(MCBinaryExpr::createSub( in processInstruction() 1867 Imm6.getExpr(), MCConstantExpr::create(2, Context), Context), Context)); in processInstruction() 1873 TmpInst.addOperand(Imm6); in processInstruction() 1884 MCOperand &Imm6 = Inst.getOperand(4); in processInstruction() local 1885 Imm6.setExpr(HexagonMCExpr::create(MCBinaryExpr::createSub( in processInstruction() [all …]
|
/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.cpp | 624 const ConstantInteger32 *Imm6) { in encodeSIMDShiftImm6() argument 625 const IValueT Imm = Imm6->getValue(); in encodeSIMDShiftImm6() 1245 const Operand *OpQm, const IValueT Imm6, in emitSIMDShiftqqc() argument 1253 emitSIMDBase(Opcode | (Imm6 << ElmtShift), mapQRegToDReg(Qd), in emitSIMDShiftqqc() 3375 const IValueT Imm6 = encodeSIMDShiftImm6(ST_Vshr, IceType_i16, 16); in vmulh() local 3378 emitSIMDBase(VshrnOpcode | (Imm6 << ImmShift), Dd, 0, Dd, UseQRegs, in vmulh() 4027 const ConstantInteger32 *Imm6) { in vshlqc() argument 4038 encodeSIMDShiftImm6(ST_Vshl, ElmtTy, Imm6), Vshl); in vshlqc() 4042 const Operand *OpQm, const ConstantInteger32 *Imm6, in vshrqc() argument 4055 encodeSIMDShiftImm6(ST_Vshr, ElmtTy, Imm6), Vshr); in vshrqc()
|
D | IceInstARM32.cpp | 1037 if (const auto *Imm6 = llvm::dyn_cast<ConstantInteger32>(getSrc(1))) { in emitIAS() local 1038 Asm->vshlqc(ElmtTy, Dest, getSrc(0), Imm6); in emitIAS() 1044 if (const auto *Imm6 = llvm::dyn_cast<ConstantInteger32>(getSrc(1))) { in emitIAS() local 1045 Asm->vshlqc(ElmtTy, Dest, getSrc(0), Imm6); in emitIAS() 1072 const auto *Imm6 = llvm::cast<ConstantInteger32>(getSrc(1)); in emitIAS() local 1076 Asm->vshrqc(ElmtTy, Dest, getSrc(0), Imm6, Sign); in emitIAS()
|
D | IceAssemblerARM32.h | 864 const Operand *OpQm, const IValueT Imm6,
|