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Searched refs:IsAdd (Results 1 – 25 of 44) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCFrameLowering.cpp454 unsigned Reg, int NumBytes, bool IsAdd, in emitRegUpdate() argument
458 Opc = IsAdd ? ARC::ADD_rru6 : ARC::SUB_rru6; in emitRegUpdate()
460 Opc = IsAdd ? ARC::ADD_rrs12 : ARC::SUB_rrs12; in emitRegUpdate()
462 Opc = IsAdd ? ARC::ADD_rrlimm : ARC::SUB_rrlimm; in emitRegUpdate()
486 bool IsAdd = (Old.getOpcode() == ARC::ADJCALLSTACKUP); in eliminateCallFramePseudoInstr() local
487 emitRegUpdate(MBB, I, dl, ARC::SP, Amt, IsAdd, TII); in eliminateCallFramePseudoInstr()
/external/llvm-project/llvm/lib/Target/ARC/
DARCFrameLowering.cpp452 unsigned Reg, int NumBytes, bool IsAdd, in emitRegUpdate() argument
456 Opc = IsAdd ? ARC::ADD_rru6 : ARC::SUB_rru6; in emitRegUpdate()
458 Opc = IsAdd ? ARC::ADD_rrs12 : ARC::SUB_rrs12; in emitRegUpdate()
460 Opc = IsAdd ? ARC::ADD_rrlimm : ARC::SUB_rrlimm; in emitRegUpdate()
484 bool IsAdd = (Old.getOpcode() == ARC::ADJCALLSTACKUP); in eliminateCallFramePseudoInstr() local
485 emitRegUpdate(MBB, I, dl, ARC::SP, Amt, IsAdd, TII); in eliminateCallFramePseudoInstr()
/external/llvm-project/llvm/unittests/Support/
DKnownBitsTest.cpp53 static void TestAddSubExhaustive(bool IsAdd) { in TestAddSubExhaustive() argument
67 if (IsAdd) in TestAddSubExhaustive()
83 IsAdd, /*NSW*/false, Known1, Known2); in TestAddSubExhaustive()
90 IsAdd, /*NSW*/true, Known1, Known2); in TestAddSubExhaustive()
/external/llvm-project/llvm/lib/Transforms/Scalar/
DLoopFlatten.cpp365 bool IsAdd = match(U, m_c_Add(m_Specific(FI.InnerInductionPHI), in checkIVUsers() local
378 if ((IsAdd || IsAddTrunc) && MatchedItCount == InnerLimit) { in checkIVUsers()
/external/tensorflow/tensorflow/core/grappler/
Dop_types.h25 bool IsAdd(const NodeDef& node);
Dop_types.cc30 bool IsAdd(const NodeDef& node) { in IsAdd() function
/external/tensorflow/tensorflow/core/grappler/optimizers/
Dremapper.cc655 if (!IsAdd(node)) return false; in IsCpuCompatibleDataType()
919 if (IsAdd(*relu_fanin_0_node_def)) { in IsCpuCompatibleDataType()
1664 if (IsAdd(*node_def)) { in IsCpuCompatibleDataType()
1744 } else if (IsAdd(*relu_fanin_0_node_def)) { in IsCpuCompatibleDataType()
Darithmetic_optimizer.cc525 if (!IsAdd(node) && !IsAddN(node)) { in CanOptimize()
884 if (i > 0 && !IsAdd(*node)) { in GetUniqueFactors()
943 return IsMul(node) || IsAdd(node); in IsBinaryAssociative()
1353 return (IsAdd(*node) || IsSub(*node)) && !IsInPreserveSet(*node); in IsSupported()
1366 node->set_op(IsAdd(*node) ? "Sub" : "AddV2"); in TrySimplify()
1369 } else if (IsAdd(*node) && IsNeg(*x)) { in TrySimplify()
2713 if (!IsAdd(*input)) { in TrySimplify()
Dconstant_folding.cc2924 const bool is_add = IsAdd(*node) || IsBiasAdd(*node) || IsLogicalOr(*node); in SimplifyArithmeticOperations()
3211 if (!parent_is_bias_add && !IsAdd(*node)) return false; in ConstantPushDownBiasAdd()
3221 if (!child_is_bias_add && !IsAdd(*ctx.op_child)) return false; in ConstantPushDownBiasAdd()
3310 const bool is_add = IsAdd(*node); in ConstantPushDown()
3324 const bool is_child_add = IsAdd(*ctx.op_child); in ConstantPushDown()
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/
DLegalizerHelper.cpp5874 const bool IsAdd = MI.getOpcode() == TargetOpcode::G_SADDO; in lowerSADDO_SSUBO() local
5879 if (IsAdd) in lowerSADDO_SSUBO()
5897 IsAdd ? CmpInst::ICMP_SLT : CmpInst::ICMP_SGT, BoolTy, RHS, Zero); in lowerSADDO_SSUBO()
5911 bool IsAdd; in lowerAddSubSatToMinMax() local
5918 IsAdd = true; in lowerAddSubSatToMinMax()
5923 IsAdd = true; in lowerAddSubSatToMinMax()
5928 IsAdd = false; in lowerAddSubSatToMinMax()
5933 IsAdd = false; in lowerAddSubSatToMinMax()
5955 if (IsAdd) { in lowerAddSubSatToMinMax()
5972 Register Not = IsAdd ? MIRBuilder.buildNot(Ty, LHS).getReg(0) : LHS; in lowerAddSubSatToMinMax()
[all …]
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUISelDAGToDAG.cpp1036 bool IsAdd = Opcode == ISD::ADD || Opcode == ISD::ADDC || Opcode == ISD::ADDE; in SelectADD_SUB_I64() local
1059 unsigned Opc = OpcMap[0][N->isDivergent()][IsAdd]; in SelectADD_SUB_I64()
1060 unsigned CarryOpc = OpcMap[1][N->isDivergent()][IsAdd]; in SelectADD_SUB_I64()
1120 bool IsAdd = N->getOpcode() == ISD::UADDO; in SelectUADDO_USUBO() local
1126 if ((IsAdd && (UI->getOpcode() != ISD::ADDCARRY)) || in SelectUADDO_USUBO()
1127 (!IsAdd && (UI->getOpcode() != ISD::SUBCARRY))) { in SelectUADDO_USUBO()
1134 unsigned Opc = IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in SelectUADDO_USUBO()
DAMDGPUInstructionSelector.cpp407 const bool IsAdd = I.getOpcode() == AMDGPU::G_UADDO || in selectG_UADDO_USUBO_UADDE_USUBE() local
414 IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in selectG_UADDO_USUBO_UADDE_USUBE()
415 unsigned CarryOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; in selectG_UADDO_USUBO_UADDE_USUBE()
430 unsigned NoCarryOpc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in selectG_UADDO_USUBO_UADDE_USUBE()
431 unsigned CarryOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in selectG_UADDO_USUBO_UADDE_USUBE()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstructionSelector.cpp397 const bool IsAdd = I.getOpcode() == AMDGPU::G_UADDO || in selectG_UADDO_USUBO_UADDE_USUBE() local
406 unsigned NoCarryOpc = IsAdd ? AMDGPU::V_ADD_I32_e64 : AMDGPU::V_SUB_I32_e64; in selectG_UADDO_USUBO_UADDE_USUBE()
407 unsigned CarryOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; in selectG_UADDO_USUBO_UADDE_USUBE()
422 unsigned NoCarryOpc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in selectG_UADDO_USUBO_UADDE_USUBE()
423 unsigned CarryOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in selectG_UADDO_USUBO_UADDE_USUBE()
DAMDGPUISelDAGToDAG.cpp1006 bool IsAdd = Opcode == ISD::ADD || Opcode == ISD::ADDC || Opcode == ISD::ADDE; in SelectADD_SUB_I64() local
1023 unsigned Opc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in SelectADD_SUB_I64()
1024 unsigned CarryOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in SelectADD_SUB_I64()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelDAGToDAG.cpp583 bool IsAdd = (N->getOpcode() == ISD::ADD); in SelectADD_SUB_I64() local
601 unsigned Opc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in SelectADD_SUB_I64()
602 unsigned CarryOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in SelectADD_SUB_I64()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp7889 bool IsAdd = Node->getOpcode() == ISD::UADDO; in expandUADDSUBO() local
7892 unsigned OpcCarry = IsAdd ? ISD::ADDCARRY : ISD::SUBCARRY; in expandUADDSUBO()
7902 Result = DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, dl, in expandUADDSUBO()
7908 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT; in expandUADDSUBO()
7918 bool IsAdd = Node->getOpcode() == ISD::SADDO; in expandSADDSUBO() local
7920 Result = DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, dl, in expandSADDSUBO()
7928 unsigned OpcSat = IsAdd ? ISD::SADDSAT : ISD::SSUBSAT; in expandSADDSUBO()
7946 DAG.getSetCC(dl, OType, RHS, Zero, IsAdd ? ISD::SETLT : ISD::SETGT); in expandSADDSUBO()
DLegalizeDAG.cpp3585 bool IsAdd = Node->getOpcode() == ISD::ADDCARRY; in ExpandNode() local
3588 unsigned Op = IsAdd ? ISD::ADD : ISD::SUB; in ExpandNode()
3595 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT; in ExpandNode()
3610 IsAdd ? DAG.getSetCC(dl, SetCCType, Sum2, Zero, ISD::SETEQ) in ExpandNode()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp7397 bool IsAdd = Node->getOpcode() == ISD::UADDO; in expandUADDSUBO() local
7400 unsigned OpcCarry = IsAdd ? ISD::ADDCARRY : ISD::SUBCARRY; in expandUADDSUBO()
7410 Result = DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, dl, in expandUADDSUBO()
7416 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT; in expandUADDSUBO()
7426 bool IsAdd = Node->getOpcode() == ISD::SADDO; in expandSADDSUBO() local
7428 Result = DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, dl, in expandSADDSUBO()
7436 unsigned OpcSat = IsAdd ? ISD::SADDSAT : ISD::SSUBSAT; in expandSADDSUBO()
7454 DAG.getSetCC(dl, OType, RHS, Zero, IsAdd ? ISD::SETLT : ISD::SETGT); in expandSADDSUBO()
DLegalizeDAG.cpp3446 bool IsAdd = Node->getOpcode() == ISD::ADDCARRY; in ExpandNode() local
3449 unsigned Op = IsAdd ? ISD::ADD : ISD::SUB; in ExpandNode()
3456 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT; in ExpandNode()
3470 IsAdd ? DAG.getSetCC(dl, SetCCType, Sum2, Zero, ISD::SETEQ) in ExpandNode()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
DAutoUpgrade.cpp2375 bool IsAdd = Name.contains(".padds"); in UpgradeIntrinsicCall() local
2376 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, true, IsAdd); in UpgradeIntrinsicCall()
2383 bool IsAdd = Name.contains(".paddus"); in UpgradeIntrinsicCall() local
2384 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, false, IsAdd); in UpgradeIntrinsicCall()
/external/swiftshader/third_party/subzero/src/
DIceTargetLoweringX86BaseImpl.h5709 bool IsAdd = false;
5752 IsAdd = true; // treat it as an add if the above conditions hold
5754 IsAdd = ArithInst->getOp() == InstArithmetic::Add;
5763 if (!IsAdd && Var1)
5773 if (!IsAdd && Reloc1)
5783 IsAdd ? Const0->getValue() : -Const0->getValue();
5790 IsAdd ? Const1->getValue() : -Const1->getValue();
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/
DValueTracking.cpp1626 bool IsAdd = II->getIntrinsicID() == Intrinsic::uadd_sat; in computeKnownBitsFromOperator() local
1634 if (IsAdd) in computeKnownBitsFromOperator()
1642 IsAdd, /* NSW */ false, Known, Known2); in computeKnownBitsFromOperator()
1646 if (IsAdd) { in computeKnownBitsFromOperator()
/external/clang/lib/Sema/
DSemaOpenMP.cpp4274 bool IsAdd = BO->getOpcode() == BO_Add; in CheckIncRHS() local
4276 return SetStep(BO->getRHS(), !IsAdd); in CheckIncRHS()
4277 if (IsAdd && GetInitLCDecl(BO->getRHS()) == LCDecl) in CheckIncRHS()
4281 bool IsAdd = CE->getOperator() == OO_Plus; in CheckIncRHS() local
4282 if ((IsAdd || CE->getOperator() == OO_Minus) && CE->getNumArgs() == 2) { in CheckIncRHS()
4284 return SetStep(CE->getArg(1), !IsAdd); in CheckIncRHS()
4285 if (IsAdd && GetInitLCDecl(CE->getArg(1)) == LCDecl) in CheckIncRHS()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/
DInstCombineSelect.cpp1768 auto IsSignedSaturateLimit = [&](Value *Limit, bool IsAdd) { in foldOverflowingAddSubSelect() argument
1791 if (IsAdd) { in foldOverflowingAddSubSelect()
/external/llvm-project/llvm/lib/Analysis/
DValueTracking.cpp1590 bool IsAdd = II->getIntrinsicID() == Intrinsic::uadd_sat; in computeKnownBitsFromOperator() local
1598 if (IsAdd) in computeKnownBitsFromOperator()
1606 IsAdd, /* NSW */ false, Known, Known2); in computeKnownBitsFromOperator()
1610 if (IsAdd) { in computeKnownBitsFromOperator()

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