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Searched refs:IsZRegister (Results 1 – 8 of 8) sorted by relevance

/external/vixl/src/aarch64/
Doperands-aarch64.h596 return base_.IsX() && regoffset_.IsZRegister() && in IsScalarPlusVector()
601 return base_.IsZRegister() && in IsVectorPlusImmediate()
607 return base_.IsZRegister() && regoffset_.IsZRegister() && (offset_ == 0) && in IsVectorPlusVector()
614 return base_.IsZRegister() || regoffset_.IsZRegister(); in IsScatterGather()
625 VIXL_ASSERT(base_.IsZRegister()); in GetVectorBase()
636 VIXL_ASSERT(regoffset_.IsZRegister()); in GetVectorOffset()
Dregisters-aarch64.h187 bool IsZRegister() const { return GetType() == kZRegister; } in IsZRegister() function
259 VIXL_ASSERT(IsNone() || IsZRegister() || IsPRegister()); in Is()
Dregisters-aarch64.cc37 if (IsZRegister()) { in GetArchitecturalName()
Dmacro-assembler-sve-aarch64.cc1114 VIXL_ASSERT(rt.IsZRegister() || rt.IsPRegister()); in SVELoadStoreScalarImmHelper()
Dassembler-sve-aarch64.cc4210 VIXL_ASSERT(rt.IsPRegister() || rt.IsZRegister()); in ldr()
5210 VIXL_ASSERT(rt.IsPRegister() || rt.IsZRegister()); in str()
Dassembler-aarch64.h6409 VIXL_ASSERT(rd.IsZRegister() || rd.IsPRegister()); in SVESize()
Dmacro-assembler-aarch64.h6678 VIXL_ASSERT(rt.IsPRegister() || rt.IsZRegister()); in CalculateSVEAddress()
/external/vixl/test/aarch64/
Dtest-utils-aarch64.h215 VIXL_ASSERT(reg.IsZRegister() || reg.IsPRegister()); in HasSVELane()
222 if (reg.IsZRegister()) { in GetSVELane()
410 VIXL_ASSERT(reg.IsZRegister() || reg.IsPRegister()); in EqualSVE()
437 VIXL_ASSERT(reg.IsZRegister() || reg.IsPRegister()); in EqualSVE()
455 VIXL_ASSERT(result.IsZRegister() || result.IsPRegister()); in EqualSVE()