LATCH (reference) in projects: external

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Searched refs:LATCH (Results 1 – 25 of 26) sorted by relevance

/external/llvm-project/llvm/test/Transforms/LoopRotate/
D	switch.ll	9 ; CHECK-NEXT: [[STATE:%.]] = phi i8 [ 2, [[START:%.]] ], [ [[NEXT_STATE:%.]], [[LATCH:%.]] ] 10 ; CHECK-NEXT: [[COUNT:%.]] = phi i64 [ 0, [[START]] ], [ [[INC:%.]], [[LATCH]] ] 12 ; CHECK-NEXT: i8 0, label [[LATCH]] 13 ; CHECK-NEXT: i8 2, label [[LATCH]] 50 …[STATE:%.]] = phi i8 [ [[START_STATE:%.]], [[START:%.]] ], [ [[NEXT_STATE:%.]], [[LATCH:%.]] ] 51 ; CHECK-NEXT: [[COUNT:%.]] = phi i64 [ 0, [[START]] ], [ [[INC:%.]], [[LATCH]] ] 53 ; CHECK-NEXT: i8 0, label [[LATCH]] 54 ; CHECK-NEXT: i8 2, label [[LATCH]] 91 ; CHECK-NEXT: [[STATE:%.]] = phi i8 [ 0, [[START:%.]] ], [ [[NEXT_STATE:%.]], [[LATCH:%.]] ] 92 ; CHECK-NEXT: [[COUNT:%.]] = phi i64 [ 0, [[START]] ], [ [[INC:%.*]], [[LATCH]] ] [all …]
/external/llvm-project/llvm/test/Analysis/ScalarEvolution/
D	pr44605.ll	`11 ; CHECK-NEXT: [[LOCAL_6_6:%.]] = phi i32 [ 10, [[ENTRY:%.]] ], [ [[TMP5:%.]], [[LATCH:%.]] ] 12 ; CHECK-NEXT: [[LOCAL_4_5:%.]] = phi i32 [ 56587, [[ENTRY]] ], [ 0, [[LATCH]] ] 13 ; CHECK-NEXT: [[LOCAL_3_4:%.]] = phi i32 [ 2, [[ENTRY]] ], [ [[TMP5]], [[LATCH]] ] 25 ; CHECK-NEXT: br i1 [[TMP4]], label [[LATCH]], label [[INNER]] 32 ; CHECK-NEXT: [[DOTLCSSA_LCSSA:%.*]] = phi i32 [ [[DOTLCSSA]], [[LATCH]] ]`
/external/llvm-project/llvm/test/Transforms/IndVarSimplify/
D	rlev-add-me.ll	14 ; CHECK-NEXT: [[IV:%.]] = phi i32 [ 0, [[ENTRY:%.]] ], [ [[IV_NEXT:%.]], [[LATCH:%.]] ] 17 ; CHECK-NEXT: br i1 [[CMP1]], label [[LATCH]], label [[EXIT1:%.]] 52 ; CHECK-NEXT: [[IV:%.]] = phi i32 [ 0, [[ENTRY:%.]] ], [ [[IV_NEXT:%.]], [[LATCH:%.]] ] 55 ; CHECK-NEXT: br i1 [[CMP1]], label [[LATCH]], label [[EXIT1:%.]] 99 ; CHECK-NEXT: [[IV:%.]] = phi i32 [ 0, [[HEADER_PREHEADER]] ], [ [[IV_NEXT:%.]], [[LATCH:%.]]… 102 ; CHECK-NEXT: br i1 [[CMP1]], label [[LATCH]], label [[EXIT1:%.]] 111 ; CHECK-NEXT: [[EXITVAL:%.]] = phi i32 [ [[IV2_LCSSA]], [[LATCH]] ] 152 ; CHECK-NEXT: [[IV:%.]] = phi i32 [ 0, [[ENTRY:%.]] ], [ [[IV_NEXT:%.]], [[LATCH:%.]] ] 156 ; CHECK-NEXT: br i1 [[CMP1]], label [[LATCH]], label [[EXIT1:%.]] 165 ; CHECK-NEXT: [[EXPR_LCSSA1:%.*]] = phi i32 [ [[EXPR]], [[LATCH]] ] [all …]
D	lftr-multi-exit.ll	17 ; CHECK-NEXT: [[IV:%.]] = phi i32 [ 0, [[ENTRY:%.]] ], [ [[IV_NEXT:%.]], [[LATCH:%.]] ] 19 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[LATCH]], label [[EXIT:%.]] 51 ; CHECK-NEXT: [[IV:%.]] = phi i32 [ 0, [[ENTRY:%.]] ], [ [[IV_NEXT:%.]], [[LATCH:%.]] ] 54 ; CHECK-NEXT: br i1 [[EARLYCND]], label [[LATCH]], label [[EXIT:%.]] 88 ; CHECK-NEXT: [[IV:%.]] = phi i32 [ 0, [[ENTRY:%.]] ], [ [[IV_NEXT:%.]], [[LATCH:%.]] ] 94 ; CHECK-NEXT: br i1 [[EXITCOND1]], label [[LATCH]], label [[EXIT]] 135 ; CHECK-NEXT: [[IV:%.]] = phi i32 [ 0, [[ENTRY:%.]] ], [ [[IV_NEXT:%.]], [[LATCH:%.]] ] 137 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[LATCH]], label [[EXIT:%.]] 172 ; CHECK-NEXT: [[IV:%.]] = phi i32 [ 0, [[ENTRY:%.]] ], [ [[IV_NEXT:%.]], [[LATCH:%.]] ] 174 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[LATCH]], label [[EXIT:%.]] [all …]
D	eliminate-exit.ll	12 ; CHECK-NEXT: [[IV:%.]] = phi i64 [ [[IV_NEXT:%.]], [[LATCH:%.]] ], [ 0, [[LOOP_PREHEADER]] ] 15 ; CHECK-NEXT: br i1 [[CMP1]], label [[LATCH]], label [[EXIT_LOOPEXIT:%.]] 48 ; CHECK-NEXT: [[IV:%.]] = phi i64 [ [[IV_NEXT:%.]], [[LATCH:%.]] ], [ 0, [[LOOP_PREHEADER]] ] 50 ; CHECK-NEXT: br i1 true, label [[LATCH]], label [[EXIT_LOOPEXIT:%.]] 84 ; CHECK-NEXT: [[IV:%.]] = phi i64 [ [[IV_NEXT:%.]], [[LATCH:%.]] ], [ 0, [[LOOP_PREHEADER]] ] 87 ; CHECK-NEXT: br i1 [[CMP1]], label [[LATCH]], label [[EXIT_LOOPEXIT:%.]] 121 ; CHECK-NEXT: [[IV:%.]] = phi i64 [ [[IV_NEXT:%.]], [[LATCH:%.]] ], [ 0, [[LOOP_PREHEADER]] ] 124 ; CHECK-NEXT: br i1 [[CMP1]], label [[LATCH]], label [[EXIT_LOOPEXIT:%.]] 159 ; CHECK-NEXT: [[IV:%.]] = phi i64 [ [[IV_NEXT:%.]], [[LATCH:%.]] ], [ 0, [[LOOP_PREHEADER]] ] 161 ; CHECK-NEXT: br i1 true, label [[LATCH]], label [[EXIT_LOOPEXIT:%.]]
D	no-iv-rewrite.ll	`440 ; CHECK-NEXT: [[PTR_IV:%.]] = phi %structIF [ [[PTR_INC:%.]], [[LATCH:%.]] ], [ [[BASE:%.]]… 443 ; CHECK-NEXT: br i1 false, label [[LATCH]], label [[EXIT:%.]]`
/external/llvm-project/llvm/test/Transforms/JumpThreading/
D	header-succ.ll	`15 ; CHECK-NEXT: [[IND:%.]] = phi i32 [ 0, [[TOP:%.]] ], [ [[NEXTIND:%.]], [[LATCH:%.]] ] 18 ; CHECK-NEXT: br i1 [[CMP]], label [[LATCH]], label [[EXIT:%.]] 60 ; CHECK-NEXT: [[IND:%.]] = phi i32 [ 0, [[TOP:%.]] ], [ [[NEXTIND:%.]], [[LATCH:%.]] ] 63 ; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.]], label [[LATCH]] 103 ; CHECK-NEXT: [[IND:%.]] = phi i32 [ 0, [[TOP:%.]] ], [ [[NEXTIND:%.]], [[LATCH:%.]] ] 106 ; CHECK-NEXT: br i1 [[CMP]], label [[LATCH]], label [[EXIT:%.*]]`
/external/llvm-project/llvm/test/Transforms/LoopSimplifyCFG/
D	live_block_marking.ll	`16 ; CHECK-NEXT: br i1 [[C:%.]], label [[TO_FOLD:%.]], label [[LATCH:%.]] 18 ; CHECK-NEXT: br i1 [[C]], label [[LATCH]], label [[INNER_PREHEADER:%.]] 26 ; CHECK-NEXT: br label [[LATCH]] 28 ; CHECK-NEXT: br label [[LATCH]]`
D	irreducible_cfg.ll	`23 ; CHECK-NEXT: br i1 [[COND:%.]], label [[LATCH:%.]], label [[IRREDUCIBLE3:%.*]]`
/external/perfetto/test/trace_processor/graphics/
D	graphics_frame_events.py	`26 LATCH = 5 variable in BufferEvent 41 …(ts=8, buffer_id=1, layer_name="layer1", frame_number=11, event_type=BufferEvent.LATCH, duration=0) 47 …ts=11, buffer_id=2, layer_name="layer2", frame_number=12, event_type=BufferEvent.LATCH, duration=0) 64 …ts=61, buffer_id=2, layer_name="layer2", frame_number=24, event_type=BufferEvent.LATCH, duration=0)`
/external/llvm-project/llvm/test/Transforms/LoopPredication/
D	profitability.ll	17 …T: [[RESULT_IN3:%.]] = phi i64 [ [[ARG2:%.]], [[ENTRY:%.]] ], [ [[ARG:%.]], [[LATCH:%.]] ] 18 ; CHECK-NEXT: [[J2:%.]] = phi i64 [ 0, [[ENTRY]] ], [ [[J_NEXT:%.]], [[LATCH]] ] 23 ; CHECK-NEXT: br i1 [[INNERCMP]], label [[LATCH]], label [[EXIT:%.]], !prof !0 76 …T: [[RESULT_IN3:%.]] = phi i64* [ [[ARG2:%.]], [[ENTRY:%.]] ], [ [[ARG:%.]], [[LATCH:%.]] ] 77 ; CHECK-NEXT: [[J2:%.]] = phi i64 [ 0, [[ENTRY]] ], [ [[J_NEXT:%.]], [[LATCH]] ] 81 ; CHECK-NEXT: br i1 [[INNERCMP]], label [[LATCH]], label [[EXIT:%.]] 130 …T: [[RESULT_IN3:%.]] = phi i64* [ [[ARG2:%.]], [[ENTRY:%.]] ], [ [[ARG:%.]], [[LATCH:%.]] ] 131 ; CHECK-NEXT: [[J2:%.]] = phi i64 [ 0, [[ENTRY]] ], [ [[J_NEXT:%.]], [[LATCH]] ] 136 ; CHECK-NEXT: br i1 [[INNERCMP]], label [[LATCH]], label [[EXIT:%.*]], !prof !1
/external/llvm-project/llvm/test/Transforms/HardwareLoops/
D	unconditional-latch.ll	`3 …-phi=true -hardware-loops -S %s -o - \| FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LATCH 6 ; CHECK-LATCH-NOT: call void @llvm.set.loop.iterations 7 ; CHECK-LATCH-NOT: call i1 @llvm.loop.decrement`
D	loop-guards.ll	2 …ce-hardware-loop-phi=true -S %s -o - \| FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LATCH 15 ; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32 [[COUNT]]) 68 ; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32 [[COUNT]]) 93 ; CHECK-LATCH: br i1 %brmerge.demorgan, label %while.cond 94 ; CHECK-LATCH-NOT: @llvm{{.*}}loop.iterations 129 ; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32 %N) 229 ; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32 %N) 261 ; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32 %N) 290 ; CHECK-LATCH: call i32 @llvm.start.loop.iterations.i32(i32
/external/llvm-project/llvm/test/Transforms/LoopVectorize/
D	reduction-small-size.ll	`7 ; CHECK-NEXT: [[INDEX:%.]] = phi i32 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.]], %[[LATCH:.]] ] 8 …: [[VEC_PHI:%.]] = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ [[TMP17:%.*]], %[[LATCH]] ] 9 ; CHECK: [[LATCH]]:`
D	invariant-store-vectorization.ll	`212 ; CHECK-NEXT: [[I:%.]] = phi i64 [ [[I_NEXT:%.]], [[LATCH:%.]] ], [ [[BC_RESUME_VAL]], [[SCAL… 219 ; CHECK-NEXT: br label [[LATCH]] 221 ; CHECK-NEXT: br label [[LATCH]] 315 ; CHECK-NEXT: [[I:%.]] = phi i64 [ [[I_NEXT:%.]], [[LATCH:%.]] ], [ [[BC_RESUME_VAL]], [[SCAL… 320 ; CHECK-NEXT: br label [[LATCH]] 322 ; CHECK-NEXT: br label [[LATCH]]`
/external/llvm-project/llvm/test/Transforms/IRCE/
D	non-loop-invariant-rhs-instr.ll	`25 ; CHECK-NEXT: [[INDVAR:%.]] = phi i64 [ [[INDVAR_NEXT:%.]], [[LATCH:%.]] ], [ 1, [[LOOP_PREHE… 32 ; CHECK-NEXT: br i1 [[CMP]], label [[ZERO_LOOPEXIT_LOOPEXIT4:%.]], label [[LATCH]] 42 ; CHECK-NEXT: [[INDVAR_NEXT_LCSSA:%.]] = phi i64 [ [[INDVAR_NEXT]], [[LATCH]] ] 43 ; CHECK-NEXT: [[RES2_LCSSA1:%.]] = phi i32 [ [[RES2]], [[LATCH]] ]`
/external/llvm-project/llvm/test/Transforms/TypePromotion/ARM/
D	switch.ll	`13 ; CHECK-NEXT: [[PHI_0:%.]] = phi i32 [ [[TMP0]], [[ENTRY:%.]] ], [ [[COUNT:%.]], [[LATCH:%.]… 14 ; CHECK-NEXT: [[PHI_1:%.]] = phi i32 [ [[TMP1]], [[ENTRY]] ], [ [[PHI_3:%.]], [[LATCH]] ] 15 ; CHECK-NEXT: [[PHI_2:%.]] = phi i32 [ 0, [[ENTRY]] ], [ [[COUNT]], [[LATCH]] ] 22 ; CHECK-NEXT: br label [[LATCH]] 25 ; CHECK-NEXT: br label [[LATCH]] 29 ; CHECK-NEXT: br i1 [[CMP2]], label [[LATCH]], label [[EXIT:%.]]`
/external/llvm-project/llvm/test/Transforms/LoopVectorize/X86/
D	load-deref-pred.ll	108 …T: [[IV:%.]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.]], [[LATCH:%.]] ] 109 …: [[ACCUM:%.]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[ACCUM_NEXT:%.]], [[LATCH]] ] 112 ; CHECK-NEXT: br i1 [[EARLYCND]], label [[PRED:%.]], label [[LATCH]] 116 ; CHECK-NEXT: br label [[LATCH]] 123 ; CHECK-NEXT: [[ACCUM_NEXT_LCSSA:%.]] = phi i32 [ [[ACCUM_NEXT]], [[LATCH]] ], [ [[TMP41]], [[M… 274 …T: [[IV:%.]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.]], [[LATCH:%.]] ] 275 …: [[ACCUM:%.]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[ACCUM_NEXT:%.]], [[LATCH]] ] 279 ; CHECK-NEXT: br i1 [[EARLYCND]], label [[PRED:%.]], label [[LATCH]] 283 ; CHECK-NEXT: br label [[LATCH]] 290 ; CHECK-NEXT: [[ACCUM_NEXT_LCSSA:%.]] = phi i32 [ [[ACCUM_NEXT]], [[LATCH]] ], [ [[TMP85]], [[M… [all …]
D	invariant-load-gather.ll	`84 ; CHECK-NEXT: [[I:%.]] = phi i64 [ [[I_NEXT:%.]], [[LATCH:%.]] ], [ [[BC_RESUME_VAL]], [[VEC_… 88 ; CHECK-NEXT: br i1 [[CMP_NOT]], label [[LATCH]], label [[COND_LOAD:%.]] 91 ; CHECK-NEXT: br label [[LATCH]] 98 ; CHECK-NEXT: [[A_LCSSA_LCSSA8:%.*]] = phi i32 [ [[A_LCSSA]], [[LATCH]] ], [ [[TMP12]], [[VEC_EP…`
D	invariant-store-vectorization.ll	`186 ; CHECK-NEXT: [[I:%.]] = phi i64 [ [[I_NEXT:%.]], [[LATCH:%.]] ], [ [[BC_RESUME_VAL]], [[VEC_… 191 ; CHECK-NEXT: br i1 [[CMP]], label [[COND_STORE:%.]], label [[LATCH]] 194 ; CHECK-NEXT: br label [[LATCH]] 326 ; CHECK-NEXT: [[I:%.]] = phi i64 [ [[I_NEXT:%.]], [[LATCH:%.]] ], [ [[BC_RESUME_VAL]], [[VEC_… 331 ; CHECK-NEXT: br i1 [[CMP]], label [[COND_STORE:%.]], label [[LATCH]] 336 ; CHECK-NEXT: br label [[LATCH]]`
/external/perfetto/protos/perfetto/trace/android/
D	graphics_frame_event.proto	`28 LATCH = 5; enumerator`
/external/llvm-project/llvm/test/Transforms/RewriteStatepointsForGC/
D	scalar-base-vector.ll	`150 ; CHECK-NEXT: [[TMP_BASE:%.]] = phi i8 addrspace(1) [ [[TMP6_BASE:%.]], [[LATCH:%.]] ], [ nu… 151 ; CHECK-NEXT: [[TMP:%.]] = phi i8 addrspace(1) [ [[TMP6:%.]], [[LATCH]] ], [ undef, [[BB]] ] 163 ; CHECK-NEXT: br i1 undef, label [[BB7:%.]], label [[LATCH]] 165 ; CHECK-NEXT: br label [[LATCH]]`
/external/perfetto/src/trace_processor/importers/proto/
D	graphics_frame_event_parser.cc	`150 graphics_frame_stats_map_[event_key][GraphicsFrameEvent::LATCH]; in CreateBufferEvent() 321 case GraphicsFrameEvent::LATCH: { in CreatePhaseEvent()`
/external/llvm-project/llvm/test/Transforms/IndVarSimplify/X86/
D	loop-invariant-conditions.ll	`483 ; CHECK-NEXT: [[PHI1:%.]] = phi i32 [ [[PHI2:%.]], [[LATCH:%.]] ], [ 0, [[ENTRY:%.]] ] 487 ; CHECK-NEXT: br label [[LATCH]] 489 ; CHECK-NEXT: br label [[LATCH]] 495 ; CHECK-NEXT: [[CMP_LCSSA:%.*]] = phi i1 [ [[CMP]], [[LATCH]] ]`
/external/llvm-project/llvm/test/Transforms/LowerSwitch/
D	do-not-handle-impossible-values.ll	`612 ; CHECK-NEXT: [[INDVAR:%.]] = phi i32 [ 0, [[ENTRY:%.]] ], [ [[INC:%.]], [[LATCH:%.]] ] 621 ; CHECK-NEXT: br label [[LATCH]] 623 ; CHECK-NEXT: br label [[LATCH]] 625 ; CHECK-NEXT: br label [[LATCH]]`

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