| /external/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 111 int LowOffset = std::min(OffsetA, OffsetB); in areMemAccessesTriviallyDisjoint() local
113 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
114 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfo.cpp | 606 int LowOffset = std::min(OffsetA, OffsetB); in areMemAccessesTriviallyDisjoint() local
608 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
609 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/llvm-project/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 109 int LowOffset = std::min(OffsetA, OffsetB); in areMemAccessesTriviallyDisjoint() local
111 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
112 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 109 int LowOffset = std::min(OffsetA, OffsetB); in areMemAccessesTriviallyDisjoint() local
111 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
112 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfo.cpp | 674 int LowOffset = std::min(OffsetA, OffsetB); in areMemAccessesTriviallyDisjoint() local
676 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
677 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86InterleavedAccess.cpp | 262 SmallVectorImpl<int> &Out, int LowOffset, in genShuffleBland() argument
268 Out.push_back(Mask[i] + LowOffset); in genShuffleBland()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InterleavedAccess.cpp | 255 SmallVectorImpl<uint32_t> &Out, int LowOffset, in genShuffleBland() argument
261 Out.push_back(Mask[i] + LowOffset); in genShuffleBland()
|
| /external/llvm-project/llvm/lib/ObjectYAML/ |
| D | DWARFYAML.cpp | 154 IO.mapRequired("LowOffset", Descriptor.LowOffset); in mapping()
|
| D | DWARFEmitter.cpp | 211 if (Error Err = writeVariableSizedInteger(Entry.LowOffset, AddrSize, OS, in emitDebugRanges()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 1806 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB; in areMemAccessesTriviallyDisjoint() local
1808 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
1809 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/llvm-project/llvm/include/llvm/ObjectYAML/ |
| D | DWARFYAML.h | 66 llvm::yaml::Hex64 LowOffset; member
|
| /external/llvm-project/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 376 int32_t LowOffset = HighOffset - 4; in lowerLoadWordFromAlignedBasePlusOffset() local
381 LowOffset); in lowerLoadWordFromAlignedBasePlusOffset()
386 DAG.getConstant(LowOffset, DL, MVT::i32)); in lowerLoadWordFromAlignedBasePlusOffset()
390 SDValue LowShift = DAG.getConstant((Offset - LowOffset) * 8, DL, MVT::i32); in lowerLoadWordFromAlignedBasePlusOffset()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 376 int32_t LowOffset = HighOffset - 4; in lowerLoadWordFromAlignedBasePlusOffset() local
381 LowOffset); in lowerLoadWordFromAlignedBasePlusOffset()
386 DAG.getConstant(LowOffset, DL, MVT::i32)); in lowerLoadWordFromAlignedBasePlusOffset()
390 SDValue LowShift = DAG.getConstant((Offset - LowOffset) * 8, DL, MVT::i32); in lowerLoadWordFromAlignedBasePlusOffset()
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 381 int32_t LowOffset = HighOffset - 4; in lowerLoadWordFromAlignedBasePlusOffset() local
386 LowOffset); in lowerLoadWordFromAlignedBasePlusOffset()
391 DAG.getConstant(LowOffset, DL, MVT::i32)); in lowerLoadWordFromAlignedBasePlusOffset()
395 SDValue LowShift = DAG.getConstant((Offset - LowOffset) * 8, DL, MVT::i32); in lowerLoadWordFromAlignedBasePlusOffset()
|
| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 1985 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB; in areMemAccessesTriviallyDisjoint() local
1987 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
1988 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 1335 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB; in offsetsDoNotOverlap() local
1337 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in offsetsDoNotOverlap()
1338 return LowOffset + LowWidth <= HighOffset; in offsetsDoNotOverlap()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 679 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB; in areMemAccessesTriviallyDisjoint() local
681 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
682 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 4301 int LowOffset = std::min(OffsetA, OffsetB); in areMemAccessesTriviallyDisjoint() local
4303 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
4304 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 5086 int LowOffset = std::min(OffsetA, OffsetB); in areMemAccessesTriviallyDisjoint() local
5088 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
5089 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 954 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB; in areMemAccessesTriviallyDisjoint() local
956 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
957 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 1077 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB; in areMemAccessesTriviallyDisjoint() local
1079 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in areMemAccessesTriviallyDisjoint()
1080 if (LowOffset + LowWidth <= HighOffset) in areMemAccessesTriviallyDisjoint()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 2522 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB; in offsetsDoNotOverlap() local
2524 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in offsetsDoNotOverlap()
2525 return LowOffset + LowWidth <= HighOffset; in offsetsDoNotOverlap()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 2903 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB; in offsetsDoNotOverlap() local
2905 int LowWidth = (LowOffset == OffsetA) ? WidthA : WidthB; in offsetsDoNotOverlap()
2906 return LowOffset + LowWidth <= HighOffset; in offsetsDoNotOverlap()
|