/external/mesa3d/src/intel/common/ |
D | gen_guardband.h | 83 const float ss_ra_xmin = MIN3( 0, m30 + m00, m30 - m00); in gen_calculate_guardband_size() 85 const float ss_ra_ymin = MIN3( 0, m31 + m11, m31 - m11); in gen_calculate_guardband_size()
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/external/mesa3d/src/util/ |
D | u_math.h | 676 #define MIN3( A, B, C ) ((A) < (B) ? MIN2(A, C) : MIN2(B, C)) macro 679 #define MIN4( A, B, C, D ) ((A) < (B) ? MIN3(A, C, D) : MIN3(B, C, D))
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D | macros.h | 306 #define MIN3( A, B, C ) ((A) < (B) ? MIN2(A, C) : MIN2(B, C)) macro
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/external/virglrenderer/src/gallium/auxiliary/util/ |
D | u_math.h | 830 #define MIN3( A, B, C ) ((A) < (B) ? MIN2(A, C) : MIN2(B, C)) macro 833 #define MIN4( A, B, C, D ) ((A) < (B) ? MIN3(A, C, D) : MIN3(B, C, D))
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/external/libavc/encoder/x86/ |
D | ih264e_intra_modes_eval_ssse3.c | 365 min_sad = MIN3(sad_horz, sad_vert, sad_dc); in ih264e_evaluate_intra16x16_modes_ssse3() 712 min_cost = MIN3(MIN3(cost[0], cost[1], cost[2]), in ih264e_evaluate_intra_4x4_modes_ssse3() 713 MIN3(cost[3], cost[4], cost[5]), in ih264e_evaluate_intra_4x4_modes_ssse3() 714 MIN3(cost[6], cost[7], cost[8])); in ih264e_evaluate_intra_4x4_modes_ssse3() 718 min_cost = MIN3(cost[0], cost[1], cost[2]); in ih264e_evaluate_intra_4x4_modes_ssse3() 1163 min_sad = MIN3(sad_horz, sad_vert, sad_dc); in ih264e_evaluate_intra_chroma_modes_ssse3()
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/external/libavc/common/ |
D | ih264_macros.h | 60 #define MIN3(a,b,c) ((a) < (b)) ? (((a) < (c)) ? (a) : (c)) : (((b) < (c)) ? (b) : (c)) macro
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/external/libavc/encoder/ |
D | ih264e_intra_modes_eval.c | 1626 i4_min_sad = MIN3(i4_sad_horz, i4_sad_dc, i4_sad_vert); in ih264e_evaluate_intra16x16_modes() 1994 i4_min_cost = MIN3(MIN3(i4_cost[0], i4_cost[1], i4_cost[2]), in ih264e_evaluate_intra_4x4_modes() 1995 MIN3(i4_cost[3], i4_cost[4], i4_cost[5]), in ih264e_evaluate_intra_4x4_modes() 1996 MIN3(i4_cost[6], i4_cost[7], i4_cost[8])); in ih264e_evaluate_intra_4x4_modes() 2002 i4_min_cost = MIN3(i4_cost[0], i4_cost[1], i4_cost[2]); in ih264e_evaluate_intra_4x4_modes() 2318 i4_min_sad = MIN3(i4_sad_horz, i4_sad_dc, i4_sad_vert); in ih264e_evaluate_intra_chroma_modes()
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/external/llvm-project/llvm/test/Transforms/SLPVectorizer/AMDGPU/ |
D | reduction.ll | 312 ; VI-NEXT: [[MIN3:%.*]] = select i1 [[CMP3]], i16 [[ELT3]], i16 [[MIN2]] 313 ; VI-NEXT: ret i16 [[MIN3]] 361 ; VI-NEXT: [[MIN3:%.*]] = select i1 [[CMP2]], i16 [[ELT3]], i16 [[MIN2]] 362 ; VI-NEXT: [[CMP3:%.*]] = icmp ult i16 [[ELT4]], [[MIN3]] 363 ; VI-NEXT: [[MIN4:%.*]] = select i1 [[CMP3]], i16 [[ELT4]], i16 [[MIN3]] 443 ; VI-NEXT: [[MIN3:%.*]] = select i1 [[CMP2]], i16 [[ELT3]], i16 [[MIN2]] 444 ; VI-NEXT: [[CMP3:%.*]] = icmp slt i16 [[ELT4]], [[MIN3]] 445 ; VI-NEXT: [[MIN4:%.*]] = select i1 [[CMP3]], i16 [[ELT4]], i16 [[MIN3]] 661 ; GCN-NEXT: [[MIN3:%.*]] = select i1 [[CMP3]], half [[ELT3]], half [[MIN2]] 662 ; GCN-NEXT: ret half [[MIN3]]
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/external/mesa3d/src/gallium/drivers/llvmpipe/ |
D | lp_setup_tri.c | 327 bbox.x0 = MIN3(position->x[0], position->x[1], position->x[2]) >> FIXED_ORDER; in do_triangle_ccw() 331 bbox.y0 = (MIN3(position->y[0], position->y[1], position->y[2]) + adj) >> FIXED_ORDER; in do_triangle_ccw()
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | reduction.ll | 212 ; GFX9-NEXT: v_pk_min_u16 [[MIN3:v[0-9]+]], [[MIN2]], [[MIN1]]{{$}} 213 ; GFX9-NEXT: v_min_u16_sdwa v{{[0-9]+}}, [[MIN3]], [[MIN3]] dst_sel:DWORD dst_unused:UNUSED_PAD src…
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/external/mesa3d/src/intel/compiler/ |
D | brw_fs_scoreboard.cpp | 711 min_dist = MIN3(min_dist, dist, 7); in ordered_dependency_swsb()
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D | brw_fs_generator.cpp | 102 const unsigned width = MIN3(reg_width, phys_width, max_hw_width); in brw_reg_from_fs_reg()
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D | brw_fs.cpp | 6783 return MIN3(devinfo->gen >= 8 ? 16 : 8, in get_lowered_simd_width()
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/external/mesa3d/src/gallium/frontends/nine/ |
D | nine_state.c | 2270 x2 = MIN3(x2, rect.x2, rt->desc.Width); in CSMT_ITEM_NO_WAIT() 2271 y2 = MIN3(y2, rect.y2, rt->desc.Height); in CSMT_ITEM_NO_WAIT() 2296 x2 = MIN3(x2, rect.x2, zsbuf_surf->desc.Width); in CSMT_ITEM_NO_WAIT() 2297 y2 = MIN3(y2, rect.y2, zsbuf_surf->desc.Height); in CSMT_ITEM_NO_WAIT()
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/external/mesa3d/src/gallium/drivers/r300/ |
D | r300_state_derived.c | 830 level_count = MIN3(sampler->max_lod, in r300_merge_textures_and_samplers()
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D | r300_emit.c | 1116 unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count, in r300_emit_vs_state()
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/external/mesa3d/src/intel/tools/ |
D | aubinator_viewer.cpp | 490 MIN3(window->len, in display_edit_window()
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/external/mesa3d/src/gallium/drivers/lima/ |
D | lima_job.c | 85 fb->shift_min = MIN3(fb->shift_w, fb->shift_h, 2); in lima_get_fb_info()
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
D | brw_wm_surface_state.c | 678 return MIN3((unsigned)obj->BufferSize, in buffer_texture_range_size()
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/external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
D | amdgpu_bo.c | 888 size = MIN3(bo->base.size / 16, in sparse_backing_alloc()
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/external/mesa3d/src/mesa/main/ |
D | texobj.c | 751 t->_MaxLevel = MIN3(t->MaxLevel, in _mesa_test_texobj_completeness()
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/external/mesa3d/src/gallium/drivers/iris/ |
D | iris_state.c | 2178 MIN3(size, res->bo->size - res->offset - offset, in fill_buffer_surface_state()
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