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Searched refs:MM32 (Results 1 – 21 of 21) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/
Dor.ll16 ; RUN: -check-prefix=MM32
32 ; MM32-LABEL: or_i1:
33 ; MM32: # %bb.0: # %entry
34 ; MM32-NEXT: or16 $4, $5
35 ; MM32-NEXT: move $2, $4
36 ; MM32-NEXT: jrc $ra
59 ; MM32-LABEL: or_i8:
60 ; MM32: # %bb.0: # %entry
61 ; MM32-NEXT: or16 $4, $5
62 ; MM32-NEXT: move $2, $4
[all …]
Dnot.ll26 ; RUN: -check-prefixes=ALL,MM,MM32
28 ; RUN: -check-prefixes=ALL,MM,MM32
97 ; MM32: not16 $2, $4
98 ; MM32: not16 $3, $5
117 ; MM32: not16 $2, $4
118 ; MM32: not16 $3, $5
119 ; MM32: not16 $4, $6
120 ; MM32: not16 $5, $7
132 ; MM32: nor $2, $5, $4
145 ; MM32: nor $2, $5, $4
[all …]
Dmul.ll26 ; RUN: FileCheck %s -check-prefixes=MM32,MM32R3
28 ; RUN: FileCheck %s -check-prefixes=MM32,MM32R6
60 ; MM32: mul $[[T0:[0-9]+]], $4, $5
61 ; MM32: andi16 $[[T0]], $[[T0]], 1
62 ; MM32: li16 $[[T1:[0-9]+]], 0
63 ; MM32: subu16 $2, $[[T1]], $[[T0]]
103 ; MM32: mul $[[T0:[0-9]+]], $4, $5
104 ; MM32: seb $2, $[[T0]]
144 ; MM32: mul $[[T0:[0-9]+]], $4, $5
145 ; MM32: seh $2, $[[T0]]
[all …]
Dadd.ll28 ; RUN: -check-prefixes=ALL,MMR3,MM32
30 ; RUN: -check-prefixes=ALL,MMR6,MM32
118 ; MM32-DAG: addu16 $3, $5, $7
119 ; MM32-DAG: addu16 $[[T0:[0-9]+]], $4, $6
120 ; MM32: sltu $[[T1:[0-9]+]], $3, $5
121 ; MM32: addu16 $2, $[[T0]], $[[T1]]
251 ; MM32: addiur2 $[[T0:[0-9]+]], $4, 4
252 ; MM32: seb $2, $[[T0]]
269 ; MM32: addiur2 $[[T0:[0-9]+]], $4, 4
270 ; MM32: seh $2, $[[T0]]
[all …]
Dsub.ll14 ; RUN: -check-prefixes=MM32,MMR3
16 ; RUN: -check-prefixes=MM32,MMR6
106 ; MM32: sltu $[[T0:[0-9]+]], $5, $7
107 ; MM32: subu16 $3, $4, $6
108 ; MM32: subu16 $2, $3, $[[T0]]
109 ; MM32: subu16 $3, $5, $7
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dadd.ll28 ; RUN: -check-prefixes=ALL,MMR6,MM32
30 ; RUN: -check-prefixes=ALL,MMR6,MM32
114 ; MM32: addu $3, $5, $7
115 ; MM32: sltu $[[T0:[0-9]+]], $3, $7
116 ; MM32: addu $[[T1:[0-9]+]], $[[T0]], $6
117 ; MM32: addu $2, $4, $[[T1]]
151 ; MM32: lw $[[T0:[0-9]+]], 28($sp)
152 ; MM32: addu $[[T1:[0-9]+]], $7, $[[T0]]
153 ; MM32: sltu $[[T2:[0-9]+]], $[[T1]], $[[T0]]
154 ; MM32: lw $[[T3:[0-9]+]], 24($sp)
[all …]
Dor.ll15 ; RUN: -check-prefixes=ALL,MM,MM32
17 ; RUN: -check-prefixes=ALL,MM,MM32
76 ; MM32: or16 $[[T0:[0-9]+]], $5
77 ; MM32: move $2, $[[T0]]
95 ; MM32: or16 $[[T0:[0-9]+]], $6
96 ; MM32: or16 $[[T1:[0-9]+]], $7
97 ; MM32: move $2, $[[T0]]
98 ; MM32: move $3, $[[T1]]
122 ; MM32: lw $[[T0:[0-9]+]], 20($sp)
123 ; MM32: lw $[[T1:[0-9]+]], 16($sp)
[all …]
Dand.ll28 ; RUN: -check-prefixes=ALL,MM,MM32
30 ; RUN: -check-prefixes=ALL,MM,MM32
88 ; MM32: and16 $[[T0:[0-9]+]], $5
89 ; MM32: move $2, $[[T0]]
107 ; MM32: and16 $[[T0:[0-9]+]], $6
108 ; MM32: and16 $[[T1:[0-9]+]], $7
109 ; MM32: move $2, $[[T0]]
110 ; MM32: move $3, $[[T1]]
134 ; MM32: lw $[[T0:[0-9]+]], 20($sp)
135 ; MM32: lw $[[T1:[0-9]+]], 16($sp)
[all …]
Dxor.ll26 ; RUN: -check-prefixes=ALL,MM,MM32
28 ; RUN: -check-prefixes=ALL,MM,MM32
86 ; MM32: xor16 $[[T0:[0-9]+]], $5
87 ; MM32: move $2, $[[T0]]
105 ; MM32: xor16 $[[T0:[0-9]+]], $6
106 ; MM32: xor16 $[[T1:[0-9]+]], $7
107 ; MM32: move $2, $[[T0]]
108 ; MM32: move $3, $[[T1]]
132 ; MM32: lw $[[T0:[0-9]+]], 20($sp)
133 ; MM32: lw $[[T1:[0-9]+]], 16($sp)
[all …]
Dnot.ll26 ; RUN: -check-prefixes=ALL,MM,MM32
28 ; RUN: -check-prefixes=ALL,MM,MM32
98 ; MM32: not16 $2, $4
99 ; MM32: not16 $3, $5
121 ; MM32: not16 $2, $4
122 ; MM32: not16 $3, $5
123 ; MM32: not16 $4, $6
124 ; MM32: not16 $5, $7
177 ; MM32: nor $2, $5, $4
198 ; MM32: nor $2, $6, $4
[all …]
Dmul.ll26 ; RUN: FileCheck %s -check-prefixes=MM32,MM32R3
28 ; RUN: FileCheck %s -check-prefixes=MM32,MM32R6
62 ; MM32: mul $[[T0:[0-9]+]], $4, $5
63 ; MM32: sll $[[T0]], $[[T0]], 31
64 ; MM32: sra $2, $[[T0]], 31
104 ; MM32: mul $[[T0:[0-9]+]], $4, $5
105 ; MM32: seb $2, $[[T0]]
145 ; MM32: mul $[[T0:[0-9]+]], $4, $5
146 ; MM32: seh $2, $[[T0]]
165 ; MM32: mul $2, $4, $5
[all …]
Dudiv.ll30 ; RUN: -check-prefixes=ALL,MMR3,MM32
32 ; RUN: -check-prefixes=ALL,MMR6,MM32
137 ; MM32: lw $25, %call16(__udivdi3)($2)
155 ; MM32: lw $25, %call16(__udivti3)($2)
Dsrem.ll30 ; RUN: -check-prefixes=ALL,MMR3,MM32
32 ; RUN: -check-prefixes=ALL,MMR6,MM32
165 ; MM32: lw $25, %call16(__moddi3)($2)
183 ; MM32: lw $25, %call16(__modti3)($2)
Dsdiv.ll30 ; RUN: -check-prefixes=ALL,MMR3,MM32
32 ; RUN: -check-prefixes=ALL,MMR6,MM32
173 ; MM32: lw $25, %call16(__divdi3)($2)
191 ; MM32: lw $25, %call16(__divti3)($2)
Durem.ll30 ; RUN: -check-prefixes=ALL,MMR3,MM32
32 ; RUN: -check-prefixes=ALL,MMR6,MM32
193 ; MM32: lw $25, %call16(__umoddi3)($2)
211 ; MM32: lw $25, %call16(__umodti3)($2)
/external/llvm-project/llvm/test/CodeGen/Mips/
Dmicromips-lwc1-swc1.ll3 ; RUN: FileCheck %s -check-prefixes=MM32
6 ; RUN: FileCheck %s -check-prefixes=MM32
13 ; MM32: lui $[[R0:[0-9]+]], %hi(_gp_disp)
14 ; MM32: addiu $[[R1:[0-9]+]], $[[R0]], %lo(_gp_disp)
15 ; MM32: addu $[[R2:[0-9]+]], $[[R1]], $25
16 ; MM32: lw $[[R3:[0-9]+]], %got(gf0)($[[R2]])
17 ; MM32: lwc1 $f0, 0($[[R3]])
26 ; MM32: lui $[[R0:[0-9]+]], %hi(_gp_disp)
27 ; MM32: addiu $[[R1:[0-9]+]], $[[R0]], %lo(_gp_disp)
28 ; MM32: addu $[[R2:[0-9]+]], $[[R1]], $25
[all …]
Drotate.ll4 ; RUN: -check-prefix=MM32
6 ; RUN: -check-prefix=MM32
10 ; MM32: li16 $2, 32
11 ; MM32: subu16 $2, $2, $5
12 ; MM32: rotrv $2, $4, $2
24 ; MM32: rotr $2, $4, 22
35 ; MM32: rotrv $2, $4, $5
47 ; MM32: rotr $2, $4, 10
Datomic.ll23 ; RUN: FileCheck %s -check-prefix=MM32
205 ; MM32-LABEL: AtomicLoadAdd32:
206 ; MM32: # %bb.0: # %entry
207 ; MM32-NEXT: lui $2, %hi(_gp_disp)
208 ; MM32-NEXT: addiu $2, $2, %lo(_gp_disp)
209 ; MM32-NEXT: addu $2, $2, $25
210 ; MM32-NEXT: lw $1, %got(x)($2)
211 ; MM32-NEXT: $BB0_1: # %entry
212 ; MM32-NEXT: # =>This Inner Loop Header: Depth=1
213 ; MM32-NEXT: ll $2, 0($1)
[all …]
/external/llvm/test/CodeGen/Mips/
Dmicromips-lwc1-swc1.ll3 ; RUN: FileCheck %s -check-prefixes=ALL,MM32
6 ; RUN: FileCheck %s -check-prefixes=ALL,MM32
16 ; MM32: lui $[[R0:[0-9]+]], %hi(_gp_disp)
17 ; MM32: addiu $[[R1:[0-9]+]], $[[R0]], %lo(_gp_disp)
18 ; MM32: addu $[[R2:[0-9]+]], $[[R1]], $25
19 ; MM32: lw $[[R3:[0-9]+]], %got(gf0)($[[R2]])
20 ; MM32: lwc1 $f0, 0($[[R3]])
35 ; MM32: lui $[[R0:[0-9]+]], %hi(_gp_disp)
36 ; MM32: addiu $[[R1:[0-9]+]], $[[R0]], %lo(_gp_disp)
37 ; MM32: addu $[[R2:[0-9]+]], $[[R1]], $25
[all …]
Drotate.ll4 ; RUN: -check-prefix=MM32
6 ; RUN: -check-prefix=MM32
10 ; MM32: li16 $2, 32
11 ; MM32: subu16 $2, $2, $5
12 ; MM32: rotrv $2, $4, $2
24 ; MM32: rotr $2, $4, 22
35 ; MM32: rotrv $2, $4, $5
47 ; MM32: rotr $2, $4, 10
/external/ms-tpm-20-ref/TPMCmd/tpm/src/support/
DTableDrivenMarshal.c748 #define MM32 0 in Marshal() macro
754 #define MM32 3 in Marshal()
767 mb[0 ^ MM32] = _source[0]; in Marshal()
768 mb[1 ^ MM32] = _source[1]; in Marshal()
769 mb[2 ^ MM32] = _source[2]; in Marshal()
770 mb[3 ^ MM32] = _source[3]; in Marshal()