Searched refs:MVEBU_DRAM_CMD_0_REG (Results 1 – 1 of 1) sorted by relevance
164 #define MVEBU_DRAM_CMD_0_REG (MVEBU_DRAM_REG_BASE + 0x20) macro396 mmio_write_32(MVEBU_DRAM_CMD_0_REG, MVEBU_DRAM_CH0_CMD0 | in a3700_en_ddr_self_refresh()