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Searched refs:MVEBU_DRAM_STATS_CH0_REG (Results 1 – 1 of 1) sorted by relevance

/external/arm-trusted-firmware/plat/marvell/armada/a3k/common/
Dplat_pm.c162 #define MVEBU_DRAM_STATS_CH0_REG (MVEBU_DRAM_REG_BASE + 0x4) macro
398 while ((mmio_read_32(MVEBU_DRAM_STATS_CH0_REG) & in a3700_en_ddr_self_refresh()