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Searched refs:MVEBU_SB_GPIO_IRQ_MASK_REG (Results 1 – 1 of 1) sorted by relevance

/external/arm-trusted-firmware/plat/marvell/armada/a3k/common/
Dplat_pm.c56 #define MVEBU_SB_GPIO_IRQ_MASK_REG (MVEBU_NB_SB_IRQ_REG_BASE + \ macro
529 mmio_clrbits_32(MVEBU_SB_GPIO_IRQ_MASK_REG, BIT(gpio)); in a3700_pm_en_sb_gpio()