| /external/llvm/lib/Support/ |
| D | ARMWinEH.cpp | 17 uint8_t NumRegisters = RF.Reg(); in SavedRegisterMask() local
26 VFPMask |= (((1 << ((NumRegisters + 1) % 8)) - 1) << 8); in SavedRegisterMask()
28 GPRMask |= (((1 << (NumRegisters + 1)) - 1) << 4); in SavedRegisterMask()
31 GPRMask |= (((1 << (NumRegisters + 1)) - 1) << (~RF.StackAdjust() & 0x3)); in SavedRegisterMask()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Support/ |
| D | ARMWinEH.cpp | 16 uint8_t NumRegisters = RF.Reg(); in SavedRegisterMask() local
25 VFPMask |= (((1 << ((NumRegisters + 1) % 8)) - 1) << 8); in SavedRegisterMask()
27 GPRMask |= (((1 << (NumRegisters + 1)) - 1) << 4); in SavedRegisterMask()
30 GPRMask |= (((1 << (NumRegisters + 1)) - 1) << (~RF.StackAdjust() & 0x3)); in SavedRegisterMask()
|
| /external/llvm-project/llvm/lib/Support/ |
| D | ARMWinEH.cpp | 16 uint8_t NumRegisters = RF.Reg(); in SavedRegisterMask() local
25 VFPMask |= (((1 << ((NumRegisters + 1) % 8)) - 1) << 8); in SavedRegisterMask()
27 GPRMask |= (((1 << (NumRegisters + 1)) - 1) << 4); in SavedRegisterMask()
30 GPRMask |= (((1 << (NumRegisters + 1)) - 1) << (~RF.StackAdjust() & 0x3)); in SavedRegisterMask()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 302 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT); in set() local
304 for (unsigned i = 0; i != NumRegisters; ++i) in set()
306 PHIReg += NumRegisters; in set()
557 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT); in getValueFromVirtualReg() local
558 for (unsigned i = 0, e = NumRegisters; i != e; ++i) in getValueFromVirtualReg()
|
| D | SelectionDAGBuilder.cpp | 10178 unsigned NumRegisters = TLI.getNumRegisters(*DAG.getContext(), VT); in HandlePHINodesInSuccessorBlocks() local
10179 for (unsigned i = 0, e = NumRegisters; i != e; ++i) in HandlePHINodesInSuccessorBlocks()
10182 Reg += NumRegisters; in HandlePHINodesInSuccessorBlocks()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 291 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT); in set() local
293 for (unsigned i = 0; i != NumRegisters; ++i) in set()
295 PHIReg += NumRegisters; in set()
546 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT); in getValueFromVirtualReg() local
547 for (unsigned i = 0, e = NumRegisters; i != e; ++i) in getValueFromVirtualReg()
|
| D | SelectionDAGBuilder.cpp | 10047 unsigned NumRegisters = TLI.getNumRegisters(*DAG.getContext(), VT); in HandlePHINodesInSuccessorBlocks() local
10048 for (unsigned i = 0, e = NumRegisters; i != e; ++i) in HandlePHINodesInSuccessorBlocks()
10051 Reg += NumRegisters; in HandlePHINodesInSuccessorBlocks()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FunctionLoweringInfo.cpp | 302 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT); in set() local
304 for (unsigned i = 0; i != NumRegisters; ++i) in set()
306 PHIReg += NumRegisters; in set()
|
| D | SelectionDAGBuilder.cpp | 8152 unsigned NumRegisters = TLI.getNumRegisters(*DAG.getContext(), VT); in HandlePHINodesInSuccessorBlocks() local
8153 for (unsigned i = 0, e = NumRegisters; i != e; ++i) in HandlePHINodesInSuccessorBlocks()
8156 Reg += NumRegisters; in HandlePHINodesInSuccessorBlocks()
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceRegAlloc.cpp | 823 const size_t NumRegisters = RegMaskFull.size(); in scan() local
830 RegUses.resize(NumRegisters); in scan()
845 Iter.Weights.reserve(NumRegisters); in scan()
846 Iter.PrecoloredUnhandledMask.reserve(NumRegisters); in scan()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1313 unsigned NumRegisters = getVectorTypeBreakdownMVT(VT, IntermediateVT, in computeRegisterProperties() local
1315 NumRegistersForVT[i] = NumRegisters; in computeRegisterProperties()
1316 assert(NumRegistersForVT[i] == NumRegisters && in computeRegisterProperties()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1468 unsigned NumRegisters = getVectorTypeBreakdownMVT(VT, IntermediateVT, in computeRegisterProperties() local
1470 NumRegistersForVT[i] = NumRegisters; in computeRegisterProperties()
1471 assert(NumRegistersForVT[i] == NumRegisters && in computeRegisterProperties()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 2123 unsigned NumRegisters; in getRegisterTypeForCallingConv() local
2124 std::tie(RegisterVT, NumRegisters) = in getRegisterTypeForCallingConv()
2141 unsigned NumRegisters; in getNumRegistersForCallingConv() local
2142 std::tie(RegisterVT, NumRegisters) = in getNumRegistersForCallingConv()
2145 return NumRegisters; in getNumRegistersForCallingConv()
|