| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMLegalizerInfo.cpp | 262 {RTLIB::OGT_F32, CmpInst::BAD_ICMP_PREDICATE}}; in setFCmpLibcallsAEABI()
270 FCmp32Libcalls[CmpInst::FCMP_ULE] = {{RTLIB::OGT_F32, CmpInst::ICMP_EQ}}; in setFCmpLibcallsAEABI()
276 {RTLIB::OGT_F32, CmpInst::BAD_ICMP_PREDICATE}, in setFCmpLibcallsAEABI()
315 FCmp32Libcalls[CmpInst::FCMP_OGT] = {{RTLIB::OGT_F32, CmpInst::ICMP_SGT}}; in setFCmpLibcallsGNU()
321 FCmp32Libcalls[CmpInst::FCMP_ULE] = {{RTLIB::OGT_F32, CmpInst::ICMP_SLE}}; in setFCmpLibcallsGNU()
325 FCmp32Libcalls[CmpInst::FCMP_ONE] = {{RTLIB::OGT_F32, CmpInst::ICMP_SGT}, in setFCmpLibcallsGNU()
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| D | ARMISelLowering.cpp | 467 { RTLIB::OGT_F32, "__gtsf2vfp", ISD::SETNE }, in ARMTargetLowering()
556 { RTLIB::OGT_F32, "__aeabi_fcmpgt", CallingConv::ARM_AAPCS, ISD::SETNE }, in ARMTargetLowering()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMLegalizerInfo.cpp | 262 {RTLIB::OGT_F32, CmpInst::BAD_ICMP_PREDICATE}}; in setFCmpLibcallsAEABI()
270 FCmp32Libcalls[CmpInst::FCMP_ULE] = {{RTLIB::OGT_F32, CmpInst::ICMP_EQ}}; in setFCmpLibcallsAEABI()
276 {RTLIB::OGT_F32, CmpInst::BAD_ICMP_PREDICATE}, in setFCmpLibcallsAEABI()
315 FCmp32Libcalls[CmpInst::FCMP_OGT] = {{RTLIB::OGT_F32, CmpInst::ICMP_SGT}}; in setFCmpLibcallsGNU()
321 FCmp32Libcalls[CmpInst::FCMP_ULE] = {{RTLIB::OGT_F32, CmpInst::ICMP_SLE}}; in setFCmpLibcallsGNU()
325 FCmp32Libcalls[CmpInst::FCMP_ONE] = {{RTLIB::OGT_F32, CmpInst::ICMP_SGT}, in setFCmpLibcallsGNU()
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| D | ARMISelLowering.cpp | 494 { RTLIB::OGT_F32, "__gtsf2vfp", ISD::SETNE }, in ARMTargetLowering()
583 { RTLIB::OGT_F32, "__aeabi_fcmpgt", CallingConv::ARM_AAPCS, ISD::SETNE }, in ARMTargetLowering()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | RuntimeLibcalls.h | 318 OGT_F32, enumerator
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 75 { RTLIB::OGT_F32, "__mips16_gtsf2" },
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 74 { RTLIB::OGT_F32, "__mips16_gtsf2" },
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 74 { RTLIB::OGT_F32, "__mips16_gtsf2" },
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | RuntimeLibcalls.def | 381 HANDLE_LIBCALL(OGT_F32, "__gtsf2")
|
| /external/llvm-project/llvm/include/llvm/IR/ |
| D | RuntimeLibcalls.def | 400 HANDLE_LIBCALL(OGT_F32, "__gtsf2")
|
| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 340 Names[RTLIB::OGT_F32] = "__gtsf2"; in InitLibcallNames()
783 CCs[RTLIB::OGT_F32] = ISD::SETGT; in InitCmpLibcallCCs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRuntimeLibcallSignatures.cpp | 313 Table[RTLIB::OGT_F32] = i32_func_f32_f32; in RuntimeLibcallSignatureTable()
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRuntimeLibcallSignatures.cpp | 317 Table[RTLIB::OGT_F32] = i32_func_f32_f32; in RuntimeLibcallSignatureTable()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 193 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : in softenSetCCOperands()
212 LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 : in softenSetCCOperands()
234 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : in softenSetCCOperands()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 558 CCs[RTLIB::OGT_F32] = ISD::SETGT; in InitCmpLibcallCCs()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 211 { RTLIB::OGT_F32, "__mspabi_cmpf", ISD::SETGT }, in MSP430TargetLowering()
|
| /external/llvm-project/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 210 { RTLIB::OGT_F32, "__mspabi_cmpf", ISD::SETGT }, in MSP430TargetLowering()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 2107 setLibcallName(RTLIB::OGT_F32, "__hexagon_fast_gtsf2"); in HexagonTargetLowering()
2116 setLibcallName(RTLIB::OGT_F32, "__hexagon_gtsf2"); in HexagonTargetLowering()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 668 CCs[RTLIB::OGT_F32] = ISD::SETGT; in InitCmpLibcallCCs()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 335 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : in softenSetCCOperands()
369 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : in softenSetCCOperands()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 343 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : in softenSetCCOperands()
377 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : in softenSetCCOperands()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 197 { RTLIB::OGT_F32, "__gtsf2vfp", ISD::SETNE }, in ARMTargetLowering()
296 { RTLIB::OGT_F32, "__aeabi_fcmpgt", CallingConv::ARM_AAPCS, ISD::SETNE }, in ARMTargetLowering()
|