Home
last modified time | relevance | path

Searched refs:OUT_REG (Results 1 – 10 of 10) sorted by relevance

/external/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_rasterizer.c54 OUT_REG(ring, in __fd6_setup_rasterizer_stateobj()
63 OUT_REG(ring, in __fd6_setup_rasterizer_stateobj()
73 OUT_REG(ring, in __fd6_setup_rasterizer_stateobj()
82 OUT_REG(ring, in __fd6_setup_rasterizer_stateobj()
93 OUT_REG(ring, in __fd6_setup_rasterizer_stateobj()
112 OUT_REG(ring, A6XX_VPC_POLYGON_MODE(mode)); in __fd6_setup_rasterizer_stateobj()
113 OUT_REG(ring, A6XX_PC_POLYGON_MODE(mode)); in __fd6_setup_rasterizer_stateobj()
Dfd6_gmem.c123 OUT_REG(ring, in emit_mrt()
133 OUT_REG(ring, in emit_mrt()
142 OUT_REG(ring, A6XX_RB_SRGB_CNTL(.dword = srgb_cntl)); in emit_mrt()
143 OUT_REG(ring, A6XX_SP_SRGB_CNTL(.dword = srgb_cntl)); in emit_mrt()
145 OUT_REG(ring, A6XX_RB_RENDER_COMPONENTS( in emit_mrt()
155 OUT_REG(ring, A6XX_SP_FS_RENDER_COMPONENTS( in emit_mrt()
165 OUT_REG(ring, A6XX_GRAS_MAX_LAYER_INDEX(max_layer_index)); in emit_mrt()
181 OUT_REG(ring, in emit_zs()
188 OUT_REG(ring, A6XX_GRAS_SU_DEPTH_BUFFER_INFO(.depth_format = fmt)); in emit_zs()
195 OUT_REG(ring, in emit_zs()
[all …]
Dfd6_blend.c89 OUT_REG(ring, A6XX_RB_MRT_BLEND_CONTROL(i, in __fd6_setup_blend_variant()
98 OUT_REG(ring, A6XX_RB_MRT_CONTROL(i, in __fd6_setup_blend_variant()
115 OUT_REG(ring, A6XX_RB_DITHER_CNTL( in __fd6_setup_blend_variant()
126 OUT_REG(ring, A6XX_SP_BLEND_CNTL( in __fd6_setup_blend_variant()
132 OUT_REG(ring, A6XX_RB_BLEND_CNTL( in __fd6_setup_blend_variant()
Dfd6_emit.c701 OUT_REG(ring, A6XX_GRAS_LRZ_CNTL( in build_lrz()
707 OUT_REG(ring, A6XX_RB_LRZ_CNTL( in build_lrz()
711 OUT_REG(ring, A6XX_RB_DEPTH_PLANE_CNTL( in build_lrz()
715 OUT_REG(ring, A6XX_GRAS_SU_DEPTH_PLANE_CNTL( in build_lrz()
861 OUT_REG(ring, in fd6_emit_state()
883 OUT_REG(ring, in fd6_emit_state()
892 OUT_REG(ring, in fd6_emit_state()
910 OUT_REG(ring, A6XX_GRAS_CL_GUARDBAND_CLIP_ADJ( in fd6_emit_state()
926 OUT_REG(ring, in fd6_emit_state()
930 OUT_REG(ring, in fd6_emit_state()
[all …]
Dfd6_draw.c357 OUT_REG(ring, A6XX_RB_CCU_CNTL(.offset = screen->info.a6xx.ccu_offset_bypass)); in fd6_clear_lrz()
359 OUT_REG(ring, A6XX_HLSQ_INVALIDATE_CMD( in fd6_clear_lrz()
428 OUT_REG(ring, in fd6_clear_lrz()
Dfd6_pack.h77 #define OUT_REG(ring, ...) \ macro
Dfd6_compute.c82 OUT_REG(ring, A6XX_HLSQ_INVALIDATE_CMD( in cs_program_emit()
Dfd6_program.c238 OUT_REG(ring, A6XX_HLSQ_INVALIDATE_CMD( in setup_config_stateobj()
899 OUT_REG(ring, A6XX_PC_PRIMID_PASSTHRU(primid_passthru)); in setup_stateobj()
/external/mesa3d/docs/relnotes/
D20.0.0.rst1100 - freedreno: Fix OUT_REG() on address regs without a .bo supplied.
2031 - freedreno/a6xx: Convert emit_mrt() to OUT_REG()
2032 - freedreno/a6xx: Convert emit_zs() to OUT_REG()
2033 - freedreno/a6xx: Convert VSC pipe setup to OUT_REG()
2034 - freedreno/a6xx: Convert gmem blits to OUT_REG()
2035 - freedreno/a6xx: Convert some tile setup to OUT_REG()
2967 - freedreno/a6xx: fix OUT_REG() vs growable cmdstream
D20.2.0.rst3990 - freedreno/a6xx: more OUT_REG()