| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 764 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(codeAddrSpace, dl), in tryLoad() local
767 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in tryLoad()
792 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(codeAddrSpace, dl), in tryLoad() local
795 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in tryLoad()
845 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(codeAddrSpace, dl), in tryLoad() local
848 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in tryLoad()
897 SDValue Ops[] = { getI32Imm(isVolatile, dl), getI32Imm(codeAddrSpace, dl), in tryLoad() local
900 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in tryLoad()
1029 SDValue Ops[] = { getI32Imm(IsVolatile, DL), getI32Imm(CodeAddrSpace, DL), in tryLoadVector() local
1032 LD = CurDAG->getMachineNode(Opcode, DL, N->getVTList(), Ops); in tryLoadVector()
[all …]
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| /external/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 2572 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, in EmitNeonCall() argument
2579 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); in EmitNeonCall()
2581 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); in EmitNeonCall()
2583 return Builder.CreateCall(F, Ops, name); in EmitNeonCall()
3273 SmallVectorImpl<Value *> &Ops, in EmitCommonNeonSISDBuiltinExpr() argument
3296 std::swap(Ops[0], Ops[1]); in EmitCommonNeonSISDBuiltinExpr()
3312 if (Ops[j]->getType()->getPrimitiveSizeInBits() == in EmitCommonNeonSISDBuiltinExpr()
3316 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); in EmitCommonNeonSISDBuiltinExpr()
3319 Ops[j] = in EmitCommonNeonSISDBuiltinExpr()
3320 CGF.Builder.CreateTruncOrBitCast(Ops[j], ArgTy->getVectorElementType()); in EmitCommonNeonSISDBuiltinExpr()
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| /external/llvm-project/llvm/lib/FuzzMutate/ |
| D | Operations.cpp | 18 void llvm::describeFuzzerIntOps(std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerIntOps() argument
19 Ops.push_back(binOpDescriptor(1, Instruction::Add)); in describeFuzzerIntOps()
20 Ops.push_back(binOpDescriptor(1, Instruction::Sub)); in describeFuzzerIntOps()
21 Ops.push_back(binOpDescriptor(1, Instruction::Mul)); in describeFuzzerIntOps()
22 Ops.push_back(binOpDescriptor(1, Instruction::SDiv)); in describeFuzzerIntOps()
23 Ops.push_back(binOpDescriptor(1, Instruction::UDiv)); in describeFuzzerIntOps()
24 Ops.push_back(binOpDescriptor(1, Instruction::SRem)); in describeFuzzerIntOps()
25 Ops.push_back(binOpDescriptor(1, Instruction::URem)); in describeFuzzerIntOps()
26 Ops.push_back(binOpDescriptor(1, Instruction::Shl)); in describeFuzzerIntOps()
27 Ops.push_back(binOpDescriptor(1, Instruction::LShr)); in describeFuzzerIntOps()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/FuzzMutate/ |
| D | Operations.cpp | 18 void llvm::describeFuzzerIntOps(std::vector<fuzzerop::OpDescriptor> &Ops) { in describeFuzzerIntOps() argument
19 Ops.push_back(binOpDescriptor(1, Instruction::Add)); in describeFuzzerIntOps()
20 Ops.push_back(binOpDescriptor(1, Instruction::Sub)); in describeFuzzerIntOps()
21 Ops.push_back(binOpDescriptor(1, Instruction::Mul)); in describeFuzzerIntOps()
22 Ops.push_back(binOpDescriptor(1, Instruction::SDiv)); in describeFuzzerIntOps()
23 Ops.push_back(binOpDescriptor(1, Instruction::UDiv)); in describeFuzzerIntOps()
24 Ops.push_back(binOpDescriptor(1, Instruction::SRem)); in describeFuzzerIntOps()
25 Ops.push_back(binOpDescriptor(1, Instruction::URem)); in describeFuzzerIntOps()
26 Ops.push_back(binOpDescriptor(1, Instruction::Shl)); in describeFuzzerIntOps()
27 Ops.push_back(binOpDescriptor(1, Instruction::LShr)); in describeFuzzerIntOps()
[all …]
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| /external/llvm/lib/Transforms/Scalar/ |
| D | Reassociate.cpp | 57 static void PrintOps(Instruction *I, const SmallVectorImpl<ValueEntry> &Ops) { in PrintOps() argument
60 << *Ops[0].Op->getType() << '\t'; in PrintOps()
61 for (unsigned i = 0, e = Ops.size(); i != e; ++i) { in PrintOps()
63 Ops[i].Op->printAsOperand(dbgs(), false, M); in PrintOps()
64 dbgs() << ", #" << Ops[i].Rank << "] "; in PrintOps()
434 SmallVectorImpl<RepeatedValue> &Ops) { in LinearizeExprTree() argument
594 Ops.push_back(std::make_pair(V, Weight)); in LinearizeExprTree()
600 if (Ops.empty()) { in LinearizeExprTree()
603 Ops.emplace_back(Identity, APInt(Bitwidth, 1)); in LinearizeExprTree()
612 SmallVectorImpl<ValueEntry> &Ops) { in RewriteExprTree() argument
[all …]
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| /external/llvm-project/llvm/lib/Transforms/Scalar/ |
| D | Reassociate.cpp | 77 static void PrintOps(Instruction *I, const SmallVectorImpl<ValueEntry> &Ops) { in PrintOps() argument
80 << *Ops[0].Op->getType() << '\t'; in PrintOps()
81 for (unsigned i = 0, e = Ops.size(); i != e; ++i) { in PrintOps()
83 Ops[i].Op->printAsOperand(dbgs(), false, M); in PrintOps()
84 dbgs() << ", #" << Ops[i].Rank << "] "; in PrintOps()
454 SmallVectorImpl<RepeatedValue> &Ops) { in LinearizeExprTree() argument
619 Ops.push_back(std::make_pair(V, Weight)); in LinearizeExprTree()
625 if (Ops.empty()) { in LinearizeExprTree()
628 Ops.emplace_back(Identity, APInt(Bitwidth, 1)); in LinearizeExprTree()
637 SmallVectorImpl<ValueEntry> &Ops) { in RewriteExprTree() argument
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| D | Reassociate.cpp | 76 static void PrintOps(Instruction *I, const SmallVectorImpl<ValueEntry> &Ops) { in PrintOps() argument
79 << *Ops[0].Op->getType() << '\t'; in PrintOps()
80 for (unsigned i = 0, e = Ops.size(); i != e; ++i) { in PrintOps()
82 Ops[i].Op->printAsOperand(dbgs(), false, M); in PrintOps()
83 dbgs() << ", #" << Ops[i].Rank << "] "; in PrintOps()
453 SmallVectorImpl<RepeatedValue> &Ops) { in LinearizeExprTree() argument
618 Ops.push_back(std::make_pair(V, Weight)); in LinearizeExprTree()
624 if (Ops.empty()) { in LinearizeExprTree()
627 Ops.emplace_back(Identity, APInt(Bitwidth, 1)); in LinearizeExprTree()
636 SmallVectorImpl<ValueEntry> &Ops) { in RewriteExprTree() argument
[all …]
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenDAGISel.inc | 79 MVT::v4i32, 2/*#Ops*/, 1, 5, // Results = #6
81 3/*#Ops*/, 6, 3, 4,
96 MVT::v4i32, 2/*#Ops*/, 1, 5, // Results = #6
98 3/*#Ops*/, 6, 3, 4,
117 MVT::v4i32, 2/*#Ops*/, 1, 5, // Results = #6
119 3/*#Ops*/, 6, 3, 4,
134 MVT::v4i32, 2/*#Ops*/, 1, 5, // Results = #6
136 3/*#Ops*/, 6, 3, 4,
154 MVT::f64, 2/*#Ops*/, 1, 5, // Results = #6
156 3/*#Ops*/, 6, 3, 4,
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| /external/llvm-project/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 5101 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, in EmitNeonCall() argument
5111 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); in EmitNeonCall()
5113 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); in EmitNeonCall()
5117 return Builder.CreateConstrainedFPCall(F, Ops, name); in EmitNeonCall()
5119 return Builder.CreateCall(F, Ops, name); in EmitNeonCall()
6014 SmallVectorImpl<Value *> &Ops, const CallExpr *E) { in EmitCommonNeonSISDBuiltinExpr() argument
6036 std::swap(Ops[0], Ops[1]); in EmitCommonNeonSISDBuiltinExpr()
6052 if (Ops[j]->getType()->getPrimitiveSizeInBits() == in EmitCommonNeonSISDBuiltinExpr()
6056 assert(ArgTy->isVectorTy() && !Ops[j]->getType()->isVectorTy()); in EmitCommonNeonSISDBuiltinExpr()
6059 Ops[j] = CGF.Builder.CreateTruncOrBitCast( in EmitCommonNeonSISDBuiltinExpr()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
| D | DebugInfoMetadata.cpp | 69 SmallVector<Metadata *, 2> Ops; in getImpl() local
70 Ops.push_back(Scope); in getImpl()
72 Ops.push_back(InlinedAt); in getImpl()
73 return storeImpl(new (Ops.size()) DILocation(Context, Storage, Line, Column, in getImpl()
74 Ops, ImplicitCode), in getImpl()
331 Metadata *Ops[] = { CountNode }; in getImpl() local
332 DEFINE_GETIMPL_STORE(DISubrange, (CountNode, Lo), Ops); in getImpl()
340 Metadata *Ops[] = {Name}; in getImpl() local
341 DEFINE_GETIMPL_STORE(DIEnumerator, (Value, IsUnsigned), Ops); in getImpl()
352 Metadata *Ops[] = {nullptr, nullptr, Name}; in getImpl() local
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| D | MDBuilder.cpp | 63 SmallVector<Metadata *, 8> Ops; in createFunctionEntryCount() local
65 Ops.push_back(createString("synthetic_function_entry_count")); in createFunctionEntryCount()
67 Ops.push_back(createString("function_entry_count")); in createFunctionEntryCount()
68 Ops.push_back(createConstant(ConstantInt::get(Int64Ty, Count))); in createFunctionEntryCount()
73 Ops.push_back(createConstant(ConstantInt::get(Int64Ty, ID))); in createFunctionEntryCount()
75 return MDNode::get(Context, Ops); in createFunctionEntryCount()
101 SmallVector<Metadata *, 4> Ops; in createCallees() local
103 Ops.push_back(createConstant(F)); in createCallees()
104 return MDNode::get(Context, Ops); in createCallees()
110 SmallVector<Metadata *, 4> Ops; in createCallbackEncoding() local
[all …]
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| D | ConstantsContext.h | 466 ArrayRef<Constant *> Ops;
470 ConstantExprKeyType(unsigned Opcode, ArrayRef<Constant *> Ops,
476 SubclassData(SubclassData), Ops(Ops), Indexes(Indexes),
482 SubclassData(CE->isCompare() ? CE->getPredicate() : 0), Ops(Operands),
496 Ops = Storage;
501 SubclassOptionalData == X.SubclassOptionalData && Ops == X.Ops &&
510 if (Ops.size() != CE->getNumOperands())
514 for (unsigned I = 0, E = Ops.size(); I != E; ++I)
515 if (Ops[I] != CE->getOperand(I))
524 hash_combine_range(Ops.begin(), Ops.end()),
[all …]
|
| /external/llvm-project/llvm/lib/IR/ |
| D | DebugInfoMetadata.cpp | 69 SmallVector<Metadata *, 2> Ops; in getImpl() local
70 Ops.push_back(Scope); in getImpl()
72 Ops.push_back(InlinedAt); in getImpl()
73 return storeImpl(new (Ops.size()) DILocation(Context, Storage, Line, Column, in getImpl()
74 Ops, ImplicitCode), in getImpl()
358 Metadata *Ops[] = {CountNode, LB, UB, Stride}; in getImpl() local
359 DEFINE_GETIMPL_STORE_NO_CONSTRUCTOR_ARGS(DISubrange, Ops); in getImpl()
444 Metadata *Ops[] = {CountNode, LB, UB, Stride}; in getImpl() local
445 DEFINE_GETIMPL_STORE_NO_CONSTRUCTOR_ARGS(DIGenericSubrange, Ops); in getImpl()
521 Metadata *Ops[] = {Name}; in getImpl() local
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| D | MDBuilder.cpp | 63 SmallVector<Metadata *, 8> Ops; in createFunctionEntryCount() local
65 Ops.push_back(createString("synthetic_function_entry_count")); in createFunctionEntryCount()
67 Ops.push_back(createString("function_entry_count")); in createFunctionEntryCount()
68 Ops.push_back(createConstant(ConstantInt::get(Int64Ty, Count))); in createFunctionEntryCount()
73 Ops.push_back(createConstant(ConstantInt::get(Int64Ty, ID))); in createFunctionEntryCount()
75 return MDNode::get(Context, Ops); in createFunctionEntryCount()
101 SmallVector<Metadata *, 4> Ops; in createCallees() local
103 Ops.push_back(createConstant(F)); in createCallees()
104 return MDNode::get(Context, Ops); in createCallees()
110 SmallVector<Metadata *, 4> Ops; in createCallbackEncoding() local
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| /external/llvm/lib/IR/ |
| D | DebugInfoMetadata.cpp | 59 SmallVector<Metadata *, 2> Ops; in getImpl() local
60 Ops.push_back(Scope); in getImpl()
62 Ops.push_back(InlinedAt); in getImpl()
63 return storeImpl(new (Ops.size()) in getImpl()
64 DILocation(Context, Storage, Line, Column, Ops), in getImpl()
226 Metadata *Ops[] = {Name}; in getImpl() local
227 DEFINE_GETIMPL_STORE(DIEnumerator, (Value), Ops); in getImpl()
237 Metadata *Ops[] = {nullptr, nullptr, Name}; in getImpl() local
239 Ops); in getImpl()
251 Metadata *Ops[] = {File, Scope, Name, BaseType, ExtraData}; in getImpl() local
[all …]
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| D | ConstantsContext.h | 444 ArrayRef<Constant *> Ops;
448 ConstantExprKeyType(unsigned Opcode, ArrayRef<Constant *> Ops,
454 SubclassData(SubclassData), Ops(Ops), Indexes(Indexes),
459 SubclassData(CE->isCompare() ? CE->getPredicate() : 0), Ops(Operands),
470 Ops = Storage;
475 SubclassOptionalData == X.SubclassOptionalData && Ops == X.Ops &&
484 if (Ops.size() != CE->getNumOperands())
488 for (unsigned I = 0, E = Ops.size(); I != E; ++I)
489 if (Ops[I] != CE->getOperand(I))
498 hash_combine_range(Ops.begin(), Ops.end()),
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenDAGISel.inc | 209 MVT::f128, 1/*#Ops*/, 2, // Results = #3
211 MVT::f128, 3/*#Ops*/, 3, 0, 1, // Results = #4
213 MVT::i32, 1/*#Ops*/, 4,
282 MVT::f128, 1/*#Ops*/, 2, // Results = #3
284 MVT::f128, 3/*#Ops*/, 3, 0, 1, // Results = #4
286 MVT::i32, 1/*#Ops*/, 4,
419 MVT::f128, 1/*#Ops*/, 2, // Results = #3
421 MVT::f128, 3/*#Ops*/, 3, 0, 1, // Results = #4
423 MVT::i32, 1/*#Ops*/, 4,
492 MVT::f128, 1/*#Ops*/, 2, // Results = #3
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMUnwindOpAsm.h | 27 SmallVector<uint8_t, 32> Ops;
38 Ops.clear(); in Reset()
63 Ops.insert(Ops.end(), Opcodes.begin(), Opcodes.end()); in EmitRaw()
73 Ops.push_back(Opcode & 0xff); in EmitInt8()
78 Ops.push_back((Opcode >> 8) & 0xff); in EmitInt16()
79 Ops.push_back(Opcode & 0xff); in EmitInt16()
84 Ops.insert(Ops.end(), Opcode, Opcode + Size); in EmitBytes()
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMUnwindOpAsm.h | 28 llvm::SmallVector<uint8_t, 32> Ops;
40 Ops.clear(); in Reset()
65 Ops.insert(Ops.end(), Opcodes.begin(), Opcodes.end()); in EmitRaw()
75 Ops.push_back(Opcode & 0xff); in EmitInt8()
80 Ops.push_back((Opcode >> 8) & 0xff); in EmitInt16()
81 Ops.push_back(Opcode & 0xff); in EmitInt16()
86 Ops.insert(Ops.end(), Opcode, Opcode + Size); in EmitBytes()
|
| /external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMUnwindOpAsm.h | 27 SmallVector<uint8_t, 32> Ops;
38 Ops.clear(); in Reset()
63 Ops.insert(Ops.end(), Opcodes.begin(), Opcodes.end()); in EmitRaw()
73 Ops.push_back(Opcode & 0xff); in EmitInt8()
78 Ops.push_back((Opcode >> 8) & 0xff); in EmitInt16()
79 Ops.push_back(Opcode & 0xff); in EmitInt16()
84 Ops.insert(Ops.end(), Opcode, Opcode + Size); in emitBytes()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 220 void AddMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc,
223 void AddMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc,
227 void AddEmptyMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc);
229 void AddEmptyMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc, EVT InactiveTy);
1624 SDValue Ops[]= { Base, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1627 MVT::Other, Ops); in tryARMIndexedLoad()
1634 SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1637 MVT::Other, Ops); in tryARMIndexedLoad()
1665 SDValue Ops[]= { Base, getAL(CurDAG, SDLoc(N)), in tryT1IndexedLoad() local
1668 MVT::i32, MVT::Other, Ops); in tryT1IndexedLoad()
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenDAGISel.inc | 73 3/*#Ops*/, 1, 3, 4,
81 3/*#Ops*/, 1, 3, 4,
89 3/*#Ops*/, 1, 3, 4,
97 3/*#Ops*/, 1, 3, 4,
113 3/*#Ops*/, 1, 2, 3,
120 3/*#Ops*/, 1, 2, 3,
136 3/*#Ops*/, 1, 3, 4,
144 3/*#Ops*/, 1, 3, 4,
160 3/*#Ops*/, 1, 2, 3,
167 3/*#Ops*/, 1, 2, 3,
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 218 void AddMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc,
221 void AddMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc,
225 void AddEmptyMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc);
227 void AddEmptyMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc, EVT InactiveTy);
1577 SDValue Ops[]= { Base, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1580 MVT::Other, Ops); in tryARMIndexedLoad()
1587 SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1590 MVT::Other, Ops); in tryARMIndexedLoad()
1618 SDValue Ops[]= { Base, getAL(CurDAG, SDLoc(N)), in tryT1IndexedLoad() local
1621 MVT::i32, MVT::Other, Ops); in tryT1IndexedLoad()
[all …]
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1527 SDValue Ops[]= { Base, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1530 MVT::i32, MVT::Other, Ops)); in tryARMIndexedLoad()
1535 SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1538 MVT::i32, MVT::Other, Ops)); in tryARMIndexedLoad()
1585 SDValue Ops[]= { Base, Offset, getAL(CurDAG, SDLoc(N)), in tryT2IndexedLoad() local
1588 MVT::Other, Ops)); in tryT2IndexedLoad()
1602 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createGPRPairNode() local
1603 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createGPRPairNode()
1613 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createSRegPairNode() local
1614 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createSRegPairNode()
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenDAGISel.inc | 86 MVT::i32, 3/*#Ops*/, 0, 1, 2,
94 MVT::i32, 3/*#Ops*/, 0, 1, 2,
124 MVT::i32, 3/*#Ops*/, 0, 1, 2,
132 MVT::i32, 3/*#Ops*/, 0, 1, 2,
159 MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5,
185 MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5,
204 MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5,
231 MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5,
258 MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5,
277 MVT::i32, 5/*#Ops*/, 0, 1, 3, 4, 5,
[all …]
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