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/external/llvm-project/llvm/test/CodeGen/PowerPC/
DtestComparesi32gtu.ll12 ; RUN: FileCheck %s --check-prefixes=CHECK-P10,CHECK-P10-LE
15 ; RUN: FileCheck %s --check-prefixes=CHECK-P10,CHECK-P10-BE
18 ; RUN: FileCheck %s --check-prefixes=CHECK-P10-CMP,CHECK-P10-CMP-LE \
22 ; RUN: FileCheck %s --check-prefixes=CHECK-P10-CMP,CHECK-P10-CMP-BE \
74 ; CHECK-P10-LE-LABEL: testCompare1:
75 ; CHECK-P10-LE: .localentry testCompare1, 1
76 ; CHECK-P10-LE-NEXT: # %bb.0: # %entry
77 ; CHECK-P10-LE-NEXT: plbz r4, testCompare1@PCREL(0), 1
78 ; CHECK-P10-LE-NEXT: lbz r3, 0(r3)
79 ; CHECK-P10-LE-NEXT: clrlwi r3, r3, 31
[all …]
DtestComparesi32ltu.ll12 ; RUN: FileCheck %s --check-prefixes=CHECK-P10,CHECK-P10-LE
15 ; RUN: FileCheck %s --check-prefixes=CHECK-P10,CHECK-P10-BE
18 ; RUN: FileCheck %s --check-prefixes=CHECK-P10-CMP,CHECK-P10-CMP-LE \
23 ; RUN: FileCheck %s --check-prefixes=CHECK-P10-CMP,CHECK-P10-CMP-BE \
76 ; CHECK-P10-LE-LABEL: testCompare1:
77 ; CHECK-P10-LE: .localentry testCompare1, 1
78 ; CHECK-P10-LE-NEXT: # %bb.0: # %entry
79 ; CHECK-P10-LE-NEXT: plbz r4, testCompare1@PCREL(0), 1
80 ; CHECK-P10-LE-NEXT: lbz r3, 0(r3)
81 ; CHECK-P10-LE-NEXT: clrlwi r3, r3, 31
[all …]
Dcrbits.ll8 ; RUN: FileCheck %s --check-prefix=CHECK-P10
11 ; RUN: FileCheck %s --check-prefix=CHECK-P10
38 ; CHECK-P10-LABEL: test1:
39 ; CHECK-P10: # %bb.0: # %entry
40 ; CHECK-P10-NEXT: fcmpu cr0, f1, f2
41 ; CHECK-P10-NEXT: xxlxor f0, f0, f0
42 ; CHECK-P10-NEXT: fcmpu cr1, f2, f2
43 ; CHECK-P10-NEXT: crnor 4*cr5+lt, un, lt
44 ; CHECK-P10-NEXT: fcmpu cr0, f2, f0
45 ; CHECK-P10-NEXT: crnor 4*cr5+gt, 4*cr1+un, gt
[all …]
DtestComparesi32leu.ll10 ; RUN: FileCheck %s --check-prefix=CHECK-P10
13 ; RUN: FileCheck %s --check-prefix=CHECK-P10
16 ; RUN: FileCheck %s --check-prefix=CHECK-P10-CMP \
20 ; RUN: FileCheck %s --check-prefix=CHECK-P10-CMP \
35 ; CHECK-P10-LABEL: test:
36 ; CHECK-P10: # %bb.0: # %entry
37 ; CHECK-P10-NEXT: clrlwi r3, r3, 31
38 ; CHECK-P10-NEXT: clrlwi r4, r4, 31
39 ; CHECK-P10-NEXT: cmplw r3, r4
40 ; CHECK-P10-NEXT: setbcr r3, gt
[all …]
Dfunc-alias.ll4 ; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefix=P10
20 ; #P10-LABEL: caller
21 ; #P10: bl newname@notoc
22 ; #P10-NOT: nop
23 ; #P10: blr
36 ; #P10-LABEL: caller_nopcrel
37 ; #P10: bl newname
38 ; #P10-NEXT: nop
39 ; #P10: blr
Dprefer-dqform.ll4 ; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names | FileCheck %s -check-prefix=CHECK-P10
26 ; CHECK-P10-LABEL: test:
27 ; CHECK-P10: .LBB0_2: # %_loop_2_do_
28 ; CHECK-P10: lxv vs1, -16(r4)
29 ; CHECK-P10: lxv vs2, 0(r4)
30 ; CHECK-P10-DAG: lxv vs3, -16(r3)
31 ; CHECK-P10-DAG: lxv vs4, 0(r3)
32 ; CHECK-P10-DAG: xvmaddadp vs1, vs3, vs1
33 ; CHECK-P10-DAG: xvmaddadp vs2, vs4, vs0
34 ; CHECK-P10-DAG: stxv vs1, -16(r4)
[all …]
DCompareEliminationSpillIssue.ll14 ; RUN: FileCheck %s --check-prefix=CHECK-P10
17 ; RUN: FileCheck %s --check-prefix=CHECK-P10
52 ; CHECK-P10-LABEL: test
53 ; CHECK-P10: sub r3,
54 ; CHECK-P10: extsw r3,
55 ; CHECK-P10: bl call
56 ; CHECK-P10: cmpw r29, r30
57 ; CHECK-P10: #APP
58 ; CHECK-P10: setbcr r3, gt
59 ; CHECK-P10: blr
/external/autotest/client/bin/self-test/tests/
D110-barrier-unordered-10x-out1 barrier: 127.0.0.1#P10 master said: ping
2 barrier: 127.0.0.1#P10 master said: rlse
3 barrier: 127.0.0.1#P10 master said: wait
4 barrier: 127.0.0.1#P10 members: 127.0.0.1#P1,127.0.0.1#P10,127.0.0.1#P2,127.0.0.1#P3,127.0.0.1#P4,1…
5 barrier: 127.0.0.1#P10 pong
6 barrier: 127.0.0.1#P10 selected as slave, master=127.0.0.1
7 barrier: 127.0.0.1#P10 tag=here port=63000 timeout=60 start=NNN
8 barrier: 127.0.0.1#P10 was released, waiting for close
9 barrier: 127.0.0.1#P1 checking client present: 127.0.0.1#P10
18 barrier: 127.0.0.1#P1 client now waiting: 127.0.0.1#P10 (127.0.0.1:33419)
[all …]
D111-barrier-unordered-20x-out1 barrier: 127.0.0.1#P10 master said: ping
2 barrier: 127.0.0.1#P10 master said: rlse
3 barrier: 127.0.0.1#P10 master said: wait
4 barrier: 127.0.0.1#P10 members: 127.0.0.1#P1,127.0.0.1#P10,127.0.0.1#P11,127.0.0.1#P12,127.0.0.1#P1…
5 barrier: 127.0.0.1#P10 pong
6 barrier: 127.0.0.1#P10 selected as slave, master=127.0.0.1
7 barrier: 127.0.0.1#P10 tag=here port=63000 timeout=60 start=NNN
8 barrier: 127.0.0.1#P10 was released, waiting for close
12 barrier: 127.0.0.1#P11 members: 127.0.0.1#P1,127.0.0.1#P10,127.0.0.1#P11,127.0.0.1#P12,127.0.0.1#P1…
20 barrier: 127.0.0.1#P12 members: 127.0.0.1#P1,127.0.0.1#P10,127.0.0.1#P11,127.0.0.1#P12,127.0.0.1#P1…
[all …]
D112-barrier-unordered-40x-out1 barrier: 127.0.0.1#P10 master said: ping
2 barrier: 127.0.0.1#P10 master said: rlse
3 barrier: 127.0.0.1#P10 master said: wait
4 barrier: 127.0.0.1#P10 members: 127.0.0.1#P1,127.0.0.1#P10,127.0.0.1#P11,127.0.0.1#P12,127.0.0.1#P1…
5 barrier: 127.0.0.1#P10 pong
6 barrier: 127.0.0.1#P10 selected as slave, master=127.0.0.1
7 barrier: 127.0.0.1#P10 tag=here port=63000 timeout=60 start=NNN
8 barrier: 127.0.0.1#P10 was released, waiting for close
12 barrier: 127.0.0.1#P11 members: 127.0.0.1#P1,127.0.0.1#P10,127.0.0.1#P11,127.0.0.1#P12,127.0.0.1#P1…
20 barrier: 127.0.0.1#P12 members: 127.0.0.1#P1,127.0.0.1#P10,127.0.0.1#P11,127.0.0.1#P12,127.0.0.1#P1…
[all …]
D113-barrier-unordered-100x-out4 barrier: 127.0.0.1#P100 members: 127.0.0.1#P1,127.0.0.1#P10,127.0.0.1#P100,127.0.0.1#P11,127.0.0.1#…
9 barrier: 127.0.0.1#P10 master said: ping
10 barrier: 127.0.0.1#P10 master said: rlse
11 barrier: 127.0.0.1#P10 master said: wait
12 barrier: 127.0.0.1#P10 members: 127.0.0.1#P1,127.0.0.1#P10,127.0.0.1#P100,127.0.0.1#P11,127.0.0.1#P…
13 barrier: 127.0.0.1#P10 pong
14 barrier: 127.0.0.1#P10 selected as slave, master=127.0.0.1
15 barrier: 127.0.0.1#P10 tag=here port=63000 timeout=60 start=NNN
16 barrier: 127.0.0.1#P10 was released, waiting for close
20 barrier: 127.0.0.1#P11 members: 127.0.0.1#P1,127.0.0.1#P10,127.0.0.1#P100,127.0.0.1#P11,127.0.0.1#P…
[all …]
/external/rust/crates/libm/src/math/
Dexp10.rs4 const P10: &[f64] = &[ constant
15 return P10[((n as isize) + 15) as usize]; in exp10()
18 return y * P10[((n as isize) + 15) as usize]; in exp10()
Dexp10f.rs5 const P10: &[f32] = &[ constant
15 return P10[((n as isize) + 7) as usize]; in exp10f()
18 return y * P10[((n as isize) + 7) as usize]; in exp10f()
/external/tensorflow/tensorflow/core/kernels/
Dspacetobatch_benchmark_test.cc61 #define BM_SpaceToBatchDev(OP, DEVICE, DTYPE, B, H, W, D, BS, P00, P01, P10, … argument
64 …BM_##OP##_##DEVICE##_##DTYPE##_##B##_##H##_##W##_##D##_bs##BS##_pad##P00##_##P01##_##P10##_##P11( \
69 … {{P00, P01}, {P10, P11}}), \
73 … (W + P10 + P11) * D); \
76 … BM_##OP##_##DEVICE##_##DTYPE##_##B##_##H##_##W##_##D##_bs##BS##_pad##P00##_##P01##_##P10##_##P11);
/external/llvm-project/clang/include/clang/Basic/
DBuiltinsPPC.def167 // P10 Vector compare builtins.
329 // P10 Vector extend sign builtins.
332 // P10 Vector Extract with Mask built-ins.
339 // P10 Vector Divide Extended built-ins.
347 // P10 Vector Multiply High built-ins.
353 // P10 Vector Expand with Mask built-ins.
360 // P10 Vector Count with Mask built-ins.
366 // P10 Move to VSR with Mask built-ins.
373 // P10 Vector Parallel Bits built-ins.
377 // P10 Vector String Isolate Built-ins.
[all …]
/external/llvm-project/llvm/test/Transforms/MemCpyOpt/
Dstackrestore.ll24 ; NO_MSSA-NEXT: [[P10:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 9
25 ; NO_MSSA-NEXT: store i8 0, i8* [[P10]], align 1
38 ; MSSA-NEXT: [[P10:%.*]] = getelementptr inbounds i8, i8* [[P]], i32 9
39 ; MSSA-NEXT: store i8 0, i8* [[P10]], align 1
76 ; CHECK-NEXT: [[P10:%.*]] = getelementptr inbounds [10 x i8], [10 x i8]* [[ARGMEM]], i32 0, i32 9
77 ; CHECK-NEXT: store i8 0, i8* [[P10]], align 1
/external/llvm-project/clang/test/Driver/
Dhip-phases.hip35 // NRD-DAG: [[P10:[0-9]+]]: linker, {[[P9]]}, hip-fatbin, (device-[[T]])
36 // RDC-DAG: [[P10:[0-9]+]]: linker, {[[P9]]}, object, (device-[[T]])
38 … "host-[[T]] (x86_64-unknown-linux-gnu)" {[[P2]]}, "device-[[T]] (amdgcn-amd-amdhsa)" {[[P10]]}, ir
39 // RDC-DAG: [[P11:[0-9]+]]: offload, "device-[[T]] (amdgcn-amd-amdhsa)" {[[P10]]}, object
83 // NRD2-DAG: [[P10:[0-9]+]]: input, "{{.*}}hip-phases.hip", [[T]], (device-[[T]], [[ARCH2:gfx900]])
84 // NRD2-DAG: [[P11:[0-9]+]]: preprocessor, {[[P10]]}, [[T]]-cpp-output, (device-[[T]], [[ARCH2]])
121 // RDC2-DAG: [[P10:[0-9]+]]: input, "{{.*}}hip-phases.hip", [[T]], (device-[[T]], [[ARCH2:gfx900]])
122 // RDC2-DAG: [[P11:[0-9]+]]: preprocessor, {[[P10]]}, [[T]]-cpp-output, (device-[[T]], [[ARCH2]])
152 // ASM2-DAG: [[P10:[0-9]+]]: input, "{{.*}}hip-phases.hip", [[T]], (host-[[T]])
153 // ASM2-DAG: [[P11:[0-9]+]]: preprocessor, {[[P10]]}, [[T]]-cpp-output, (host-[[T]])
[all …]
/external/llvm-project/llvm/docs/AMDGPU/
Dgfx9_param.rst19 p10 Parameter *P10*.
Dgfx10_param.rst19 p10 Parameter *P10*.
Dgfx8_param.rst19 p10 Parameter *P10*.
Dgfx7_param.rst19 p10 Parameter *P10*.
/external/llvm-project/llvm/include/llvm/IR/
DIntrinsicsPowerPC.td500 // P10 Vector Extract with Mask
512 // P10 Vector Expand with Mask
524 // P10 Vector Count with Mask intrinsics.
538 // P10 Move to VSR with Mask Intrinsics.
550 // P10 Vector Parallel Bits Deposit/Extract Doubleword Builtins.
558 // P10 Vector String Isolate Intrinsics.
577 // P10 Vector Centrifuge Builtin.
582 // P10 Vector Gather Every Nth Bit Builtin.
587 // P10 Vector Clear Bytes
595 // P10 Vector Shift Double Bit Immediate.
[all …]
/external/llvm-project/llvm/test/CodeGen/Hexagon/
Disel-zext-vNi1.ll23 ; CHECK: p[[P10:[0-3]]] = vcmpw.gt(r[[D11]],r[[D10]])
24 ; CHECK: r{{[0-9]+}}:[[R10:[0-9]+]] = mask(p[[P10]])
/external/skqp/src/pathops/
DSkPathOpsConic.cpp19 const double P10 = src[2] - src[0]; in conic_deriv_coeff() local
20 const double wP10 = w * P10; in conic_deriv_coeff()
/external/skia/src/pathops/
DSkPathOpsConic.cpp19 const double P10 = src[2] - src[0]; in conic_deriv_coeff() local
20 const double wP10 = w * P10; in conic_deriv_coeff()

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