Searched refs:PDCRH (Results 1 – 3 of 3) sorted by relevance
| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/ |
| D | stm32l4xx_hal_pwr_ex.c | 454 CLEAR_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); in HAL_PWREx_EnableGPIOPullUp()
456 CLEAR_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_EnableGPIOPullUp()
607 SET_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); in HAL_PWREx_EnableGPIOPullDown()
609 SET_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_EnableGPIOPullDown()
680 CLEAR_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); in HAL_PWREx_DisableGPIOPullDown()
682 CLEAR_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_DisableGPIOPullDown()
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/ |
| D | stm32l4xx_hal_pwr_ex.c | 454 CLEAR_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); in HAL_PWREx_EnableGPIOPullUp()
456 CLEAR_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_EnableGPIOPullUp()
607 SET_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); in HAL_PWREx_EnableGPIOPullDown()
609 SET_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_EnableGPIOPullDown()
680 CLEAR_BIT(PWR->PDCRH, ((GPIONumber & PWR_PORTH_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_3)))); in HAL_PWREx_DisableGPIOPullDown()
682 CLEAR_BIT(PWR->PDCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_DisableGPIOPullDown()
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| /external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
| D | stm32l476xx.h | 672 __IO uint32_t PDCRH; /*!< Pull_Down control register of portH, Address offset: 0x5C */ member
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