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Searched refs:PLLCFGR (Results 1 – 9 of 9) sorted by relevance

/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Src/
Dsystem_stm32l4xx.c214 RCC->PLLCFGR = 0x00001000U; in SystemInit()
307 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); in SystemCoreClockUpdate()
308 pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; in SystemCoreClockUpdate()
324 pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); in SystemCoreClockUpdate()
325 pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; in SystemCoreClockUpdate()
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Src/
Dsystem_stm32l4xx.c214 RCC->PLLCFGR = 0x00001000U; in SystemInit()
307 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); in SystemCoreClockUpdate()
308 pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; in SystemCoreClockUpdate()
324 pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); in SystemCoreClockUpdate()
325 pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; in SystemCoreClockUpdate()
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_rcc.c107 (MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__HAL_RCC_PLLSOURCE__)))
356 CLEAR_REG(RCC->PLLCFGR); in HAL_RCC_DeInit()
357 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN_4 ); in HAL_RCC_DeInit()
856 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); in HAL_RCC_OscConfig()
1294 pllsource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); in HAL_RCC_GetSysClockFreq()
1295 pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; in HAL_RCC_GetSysClockFreq()
1300 … pllvco = (HSI_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); in HAL_RCC_GetSysClockFreq()
1304 … pllvco = (HSE_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); in HAL_RCC_GetSysClockFreq()
1309 … pllvco = (msirange / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); in HAL_RCC_GetSysClockFreq()
1312 pllr = ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U ) * 2U; in HAL_RCC_GetSysClockFreq()
[all …]
Dstm32l4xx_hal_rcc_ex.c910 …PeriphClkInit->PLLSAI1.PLLSAI1Source = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC) >> RCC_PLLCFGR_P… in HAL_RCCEx_GetPeriphCLKConfig()
914 …PeriphClkInit->PLLSAI1.PLLSAI1M = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Po… in HAL_RCCEx_GetPeriphCLKConfig()
1205 pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); in HAL_RCCEx_GetPeriphCLKFreq()
1261 plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; in HAL_RCCEx_GetPeriphCLKFreq()
1263 pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; in HAL_RCCEx_GetPeriphCLKFreq()
1267 if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) in HAL_RCCEx_GetPeriphCLKFreq()
1322 plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; in HAL_RCCEx_GetPeriphCLKFreq()
1324 pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; in HAL_RCCEx_GetPeriphCLKFreq()
1328 if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) in HAL_RCCEx_GetPeriphCLKFreq()
1461 … if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY) && HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) in HAL_RCCEx_GetPeriphCLKFreq()
[all …]
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_rcc.c107 (MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__HAL_RCC_PLLSOURCE__)))
356 CLEAR_REG(RCC->PLLCFGR); in HAL_RCC_DeInit()
357 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN_4 ); in HAL_RCC_DeInit()
856 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); in HAL_RCC_OscConfig()
1294 pllsource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); in HAL_RCC_GetSysClockFreq()
1295 pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; in HAL_RCC_GetSysClockFreq()
1300 … pllvco = (HSI_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); in HAL_RCC_GetSysClockFreq()
1304 … pllvco = (HSE_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); in HAL_RCC_GetSysClockFreq()
1309 … pllvco = (msirange / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); in HAL_RCC_GetSysClockFreq()
1312 pllr = ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U ) * 2U; in HAL_RCC_GetSysClockFreq()
[all …]
Dstm32l4xx_hal_rcc_ex.c910 …PeriphClkInit->PLLSAI1.PLLSAI1Source = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC) >> RCC_PLLCFGR_P… in HAL_RCCEx_GetPeriphCLKConfig()
914 …PeriphClkInit->PLLSAI1.PLLSAI1M = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Po… in HAL_RCCEx_GetPeriphCLKConfig()
1205 pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); in HAL_RCCEx_GetPeriphCLKFreq()
1261 plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; in HAL_RCCEx_GetPeriphCLKFreq()
1263 pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; in HAL_RCCEx_GetPeriphCLKFreq()
1267 if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) in HAL_RCCEx_GetPeriphCLKFreq()
1322 plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; in HAL_RCCEx_GetPeriphCLKFreq()
1324 pllp = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_Pos; in HAL_RCCEx_GetPeriphCLKFreq()
1328 if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) in HAL_RCCEx_GetPeriphCLKFreq()
1461 … if(HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY) && HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) in HAL_RCCEx_GetPeriphCLKFreq()
[all …]
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_rcc.h4006 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__PLLSOURCE__))
4020 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, ((__PLLM__) - 1) << 4U)
4064 … (RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \
4070 … (RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \
4084 #define __HAL_RCC_GET_PLL_OSCSOURCE() (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC))
4100 #define __HAL_RCC_PLLCLKOUT_ENABLE(__PLLCLOCKOUT__) SET_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))
4102 #define __HAL_RCC_PLLCLKOUT_DISABLE(__PLLCLOCKOUT__) CLEAR_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))
4115 #define __HAL_RCC_GET_PLLCLKOUT_CONFIG(__PLLCLOCKOUT__) READ_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_rcc.h4006 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__PLLSOURCE__))
4020 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, ((__PLLM__) - 1) << 4U)
4064 … (RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \
4070 … (RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \
4084 #define __HAL_RCC_GET_PLL_OSCSOURCE() (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC))
4100 #define __HAL_RCC_PLLCLKOUT_ENABLE(__PLLCLOCKOUT__) SET_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))
4102 #define __HAL_RCC_PLLCLKOUT_DISABLE(__PLLCLOCKOUT__) CLEAR_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))
4115 #define __HAL_RCC_GET_PLLCLKOUT_CONFIG(__PLLCLOCKOUT__) READ_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
Dstm32l476xx.h707 …__IO uint32_t PLLCFGR; /*!< RCC system PLL configuration register, … member