| /external/libsrtp2/ |
| D | CHANGES | 11 PR #409 - Compatibilty with LibreSSL
13 PR #406 - Fix unprotect when pktlen < (2*mki_size + tag_len)
15 PR #405 - Prevent potential double free
17 PR #404 - Add back extern to global variables
19 PR #403 - Set gcm IV directly with EVP_CipherInit_ex
21 PR #401 - Fix memory access issue in srtp_get_session_keys()
23 PR #398 - Fix memory access fixes when invalid profiles where used
25 PR #391 - Return NULL when allocating memory of size zero
27 PR #390 - Bitvector of length zero is not valid
29 PR #385 - Treat warnings as errors on travis builds
[all …]
|
| /external/python/cpython2/Mac/BuildScript/scripts/ |
| D | postflight.patch-profile | 70 PR="${HOME}/.bash_profile"
72 PR="${HOME}/.bash_login"
74 PR="${HOME}/.profile"
76 PR="${HOME}/.bash_profile"
80 PR="${HOME}/.zprofile"
83 PR="${HOME}/.profile"
88 if [ -f "${PR}" ]; then
89 cp -fp "${PR}" "${PR}.pysave"
91 echo "" >> "${PR}"
92 echo "# Setting PATH for Python ${PYVER}" >> "${PR}"
[all …]
|
| /external/python/cpython3/Mac/BuildScript/scripts/ |
| D | postflight.patch-profile | 70 PR="${HOME}/.bash_profile"
72 PR="${HOME}/.bash_login"
74 PR="${HOME}/.profile"
76 PR="${HOME}/.bash_profile"
80 PR="${HOME}/.zprofile"
83 PR="${HOME}/.profile"
88 if [ -f "${PR}" ]; then
89 cp -fp "${PR}" "${PR}.pysave"
91 echo "" >> "${PR}"
92 echo "# Setting PATH for Python ${PYVER}" >> "${PR}"
[all …]
|
| /external/rust/crates/libz-sys/src/zlib/os400/ |
| D | zlib.inc | 114 D compress PR 10I 0 extproc('compress')
120 D compress2 PR 10I 0 extproc('compress2')
127 D compressBound PR 10U 0 extproc('compressBound')
130 D uncompress PR 10I 0 extproc('uncompress')
136 D uncompress2 PR 10I 0 extproc('uncompress2')
143 D gzopen PR extproc('gzopen')
148 D gzopen PR extproc('gzopen64')
153 D gzopen64 PR extproc('gzopen64')
159 D gzdopen PR extproc('gzdopen')
164 D gzbuffer PR 10I 0 extproc('gzbuffer')
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | aix-xcoff-funcsect.ll | 37 ; ASM: .csect .foo[PR],2
39 ; ASM-NEXT: .globl .foo[PR]
43 ; ASM-NEXT: .vbyte {{[0-9]+}}, .foo[PR]
46 ; ASM-NEXT: .csect .foo[PR],2
50 ; ASM: .csect .hidden_foo[PR],2
52 ; ASM-NEXT: .globl .hidden_foo[PR],hidden
55 ; ASM-NEXT: .vbyte {{[0-9]+}}, .hidden_foo[PR] # @hidden_foo
58 ; ASM-NEXT: .csect .hidden_foo[PR]
61 ; ASM: .csect .bar[PR],2
63 ; ASM-NEXT: .globl .bar[PR]
[all …]
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUTargetMachine.cpp | 206 PassRegistry *PR = PassRegistry::getPassRegistry(); in LLVMInitializeAMDGPUTarget() local
207 initializeR600ClauseMergePassPass(*PR); in LLVMInitializeAMDGPUTarget()
208 initializeR600ControlFlowFinalizerPass(*PR); in LLVMInitializeAMDGPUTarget()
209 initializeR600PacketizerPass(*PR); in LLVMInitializeAMDGPUTarget()
210 initializeR600ExpandSpecialInstrsPassPass(*PR); in LLVMInitializeAMDGPUTarget()
211 initializeR600VectorRegMergerPass(*PR); in LLVMInitializeAMDGPUTarget()
212 initializeGlobalISel(*PR); in LLVMInitializeAMDGPUTarget()
213 initializeAMDGPUDAGToDAGISelPass(*PR); in LLVMInitializeAMDGPUTarget()
214 initializeGCNDPPCombinePass(*PR); in LLVMInitializeAMDGPUTarget()
215 initializeSILowerI1CopiesPass(*PR); in LLVMInitializeAMDGPUTarget()
[all …]
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyTargetMachine.cpp | 66 auto &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeWebAssemblyTarget() local
67 initializeWebAssemblyAddMissingPrototypesPass(PR); in LLVMInitializeWebAssemblyTarget()
68 initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR); in LLVMInitializeWebAssemblyTarget()
69 initializeLowerGlobalDtorsPass(PR); in LLVMInitializeWebAssemblyTarget()
70 initializeFixFunctionBitcastsPass(PR); in LLVMInitializeWebAssemblyTarget()
71 initializeOptimizeReturnedPass(PR); in LLVMInitializeWebAssemblyTarget()
72 initializeWebAssemblyArgumentMovePass(PR); in LLVMInitializeWebAssemblyTarget()
73 initializeWebAssemblySetP2AlignOperandsPass(PR); in LLVMInitializeWebAssemblyTarget()
74 initializeWebAssemblyReplacePhysRegsPass(PR); in LLVMInitializeWebAssemblyTarget()
75 initializeWebAssemblyPrepareForLiveIntervalsPass(PR); in LLVMInitializeWebAssemblyTarget()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyTargetMachine.cpp | 56 auto &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeWebAssemblyTarget() local
57 initializeWebAssemblyAddMissingPrototypesPass(PR); in LLVMInitializeWebAssemblyTarget()
58 initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR); in LLVMInitializeWebAssemblyTarget()
59 initializeLowerGlobalDtorsPass(PR); in LLVMInitializeWebAssemblyTarget()
60 initializeFixFunctionBitcastsPass(PR); in LLVMInitializeWebAssemblyTarget()
61 initializeOptimizeReturnedPass(PR); in LLVMInitializeWebAssemblyTarget()
62 initializeWebAssemblyArgumentMovePass(PR); in LLVMInitializeWebAssemblyTarget()
63 initializeWebAssemblySetP2AlignOperandsPass(PR); in LLVMInitializeWebAssemblyTarget()
64 initializeWebAssemblyReplacePhysRegsPass(PR); in LLVMInitializeWebAssemblyTarget()
65 initializeWebAssemblyPrepareForLiveIntervalsPass(PR); in LLVMInitializeWebAssemblyTarget()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUTargetMachine.cpp | 191 PassRegistry *PR = PassRegistry::getPassRegistry(); in LLVMInitializeAMDGPUTarget() local
192 initializeR600ClauseMergePassPass(*PR); in LLVMInitializeAMDGPUTarget()
193 initializeR600ControlFlowFinalizerPass(*PR); in LLVMInitializeAMDGPUTarget()
194 initializeR600PacketizerPass(*PR); in LLVMInitializeAMDGPUTarget()
195 initializeR600ExpandSpecialInstrsPassPass(*PR); in LLVMInitializeAMDGPUTarget()
196 initializeR600VectorRegMergerPass(*PR); in LLVMInitializeAMDGPUTarget()
197 initializeGlobalISel(*PR); in LLVMInitializeAMDGPUTarget()
198 initializeAMDGPUDAGToDAGISelPass(*PR); in LLVMInitializeAMDGPUTarget()
199 initializeGCNDPPCombinePass(*PR); in LLVMInitializeAMDGPUTarget()
200 initializeSILowerI1CopiesPass(*PR); in LLVMInitializeAMDGPUTarget()
[all …]
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86TargetMachine.cpp | 64 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeX86Target() local
65 initializeGlobalISel(PR); in LLVMInitializeX86Target()
66 initializeWinEHStatePassPass(PR); in LLVMInitializeX86Target()
67 initializeFixupBWInstPassPass(PR); in LLVMInitializeX86Target()
68 initializeEvexToVexInstPassPass(PR); in LLVMInitializeX86Target()
69 initializeFixupLEAPassPass(PR); in LLVMInitializeX86Target()
70 initializeFPSPass(PR); in LLVMInitializeX86Target()
71 initializeX86FixupSetCCPassPass(PR); in LLVMInitializeX86Target()
72 initializeX86CallFrameOptimizationPass(PR); in LLVMInitializeX86Target()
73 initializeX86CmovConverterPassPass(PR); in LLVMInitializeX86Target()
[all …]
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64TargetMachine.cpp | 171 auto PR = PassRegistry::getPassRegistry(); in LLVMInitializeAArch64Target() local
172 initializeGlobalISel(*PR); in LLVMInitializeAArch64Target()
173 initializeAArch64A53Fix835769Pass(*PR); in LLVMInitializeAArch64Target()
174 initializeAArch64A57FPLoadBalancingPass(*PR); in LLVMInitializeAArch64Target()
175 initializeAArch64AdvSIMDScalarPass(*PR); in LLVMInitializeAArch64Target()
176 initializeAArch64BranchTargetsPass(*PR); in LLVMInitializeAArch64Target()
177 initializeAArch64CollectLOHPass(*PR); in LLVMInitializeAArch64Target()
178 initializeAArch64CompressJumpTablesPass(*PR); in LLVMInitializeAArch64Target()
179 initializeAArch64ConditionalComparesPass(*PR); in LLVMInitializeAArch64Target()
180 initializeAArch64ConditionOptimizerPass(*PR); in LLVMInitializeAArch64Target()
[all …]
|
| /external/llvm-project/llvm/unittests/DebugInfo/CodeView/ |
| D | TypeHashingTest.cpp | 20 PointerRecord PR(TypeRecordKind::Pointer); in createPointerRecord() local
21 PR.setAttrs(PointerKind::Near32, PointerMode::Pointer, PointerOptions::None, in createPointerRecord()
23 PR.ReferentType = TI; in createPointerRecord()
24 return Builder.writeLeafType(PR); in createPointerRecord()
38 ProcedureRecord PR(TypeRecordKind::Procedure); in createProcedureRecord() local
39 PR.ArgumentList = ArgList; in createProcedureRecord()
40 PR.CallConv = CallingConvention::NearC; in createProcedureRecord()
41 PR.Options = FunctionOptions::None; in createProcedureRecord()
42 PR.ParameterCount = ParamCount; in createProcedureRecord()
43 PR.ReturnType = Return; in createProcedureRecord()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64TargetMachine.cpp | 164 auto PR = PassRegistry::getPassRegistry(); in LLVMInitializeAArch64Target() local
165 initializeGlobalISel(*PR); in LLVMInitializeAArch64Target()
166 initializeAArch64A53Fix835769Pass(*PR); in LLVMInitializeAArch64Target()
167 initializeAArch64A57FPLoadBalancingPass(*PR); in LLVMInitializeAArch64Target()
168 initializeAArch64AdvSIMDScalarPass(*PR); in LLVMInitializeAArch64Target()
169 initializeAArch64BranchTargetsPass(*PR); in LLVMInitializeAArch64Target()
170 initializeAArch64CollectLOHPass(*PR); in LLVMInitializeAArch64Target()
171 initializeAArch64CompressJumpTablesPass(*PR); in LLVMInitializeAArch64Target()
172 initializeAArch64ConditionalComparesPass(*PR); in LLVMInitializeAArch64Target()
173 initializeAArch64ConditionOptimizerPass(*PR); in LLVMInitializeAArch64Target()
[all …]
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUTargetMachine.cpp | 75 PassRegistry *PR = PassRegistry::getPassRegistry(); in LLVMInitializeAMDGPUTarget() local
76 initializeSILowerI1CopiesPass(*PR); in LLVMInitializeAMDGPUTarget()
77 initializeSIFixSGPRCopiesPass(*PR); in LLVMInitializeAMDGPUTarget()
78 initializeSIFoldOperandsPass(*PR); in LLVMInitializeAMDGPUTarget()
79 initializeSIShrinkInstructionsPass(*PR); in LLVMInitializeAMDGPUTarget()
80 initializeSIFixControlFlowLiveIntervalsPass(*PR); in LLVMInitializeAMDGPUTarget()
81 initializeSILoadStoreOptimizerPass(*PR); in LLVMInitializeAMDGPUTarget()
82 initializeAMDGPUAnnotateKernelFeaturesPass(*PR); in LLVMInitializeAMDGPUTarget()
83 initializeAMDGPUAnnotateUniformValuesPass(*PR); in LLVMInitializeAMDGPUTarget()
84 initializeAMDGPUPromoteAllocaPass(*PR); in LLVMInitializeAMDGPUTarget()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCTargetMachine.cpp | 103 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializePowerPCTarget() local
105 initializePPCCTRLoopsVerifyPass(PR); in LLVMInitializePowerPCTarget()
107 initializePPCLoopInstrFormPrepPass(PR); in LLVMInitializePowerPCTarget()
108 initializePPCTOCRegDepsPass(PR); in LLVMInitializePowerPCTarget()
109 initializePPCEarlyReturnPass(PR); in LLVMInitializePowerPCTarget()
110 initializePPCVSXCopyPass(PR); in LLVMInitializePowerPCTarget()
111 initializePPCVSXFMAMutatePass(PR); in LLVMInitializePowerPCTarget()
112 initializePPCVSXSwapRemovalPass(PR); in LLVMInitializePowerPCTarget()
113 initializePPCReduceCRLogicalsPass(PR); in LLVMInitializePowerPCTarget()
114 initializePPCBSelPass(PR); in LLVMInitializePowerPCTarget()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86TargetMachine.cpp | 69 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeX86Target() local
70 initializeGlobalISel(PR); in LLVMInitializeX86Target()
71 initializeWinEHStatePassPass(PR); in LLVMInitializeX86Target()
72 initializeFixupBWInstPassPass(PR); in LLVMInitializeX86Target()
73 initializeEvexToVexInstPassPass(PR); in LLVMInitializeX86Target()
74 initializeFixupLEAPassPass(PR); in LLVMInitializeX86Target()
75 initializeFPSPass(PR); in LLVMInitializeX86Target()
76 initializeX86CallFrameOptimizationPass(PR); in LLVMInitializeX86Target()
77 initializeX86CmovConverterPassPass(PR); in LLVMInitializeX86Target()
78 initializeX86ExpandPseudoPass(PR); in LLVMInitializeX86Target()
[all …]
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCTargetMachine.cpp | 106 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializePowerPCTarget() local
108 initializePPCCTRLoopsVerifyPass(PR); in LLVMInitializePowerPCTarget()
110 initializePPCLoopInstrFormPrepPass(PR); in LLVMInitializePowerPCTarget()
111 initializePPCTOCRegDepsPass(PR); in LLVMInitializePowerPCTarget()
112 initializePPCEarlyReturnPass(PR); in LLVMInitializePowerPCTarget()
113 initializePPCVSXCopyPass(PR); in LLVMInitializePowerPCTarget()
114 initializePPCVSXFMAMutatePass(PR); in LLVMInitializePowerPCTarget()
115 initializePPCVSXSwapRemovalPass(PR); in LLVMInitializePowerPCTarget()
116 initializePPCReduceCRLogicalsPass(PR); in LLVMInitializePowerPCTarget()
117 initializePPCBSelPass(PR); in LLVMInitializePowerPCTarget()
[all …]
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXTargetMachine.cpp | 77 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeNVPTXTarget() local
78 initializeNVVMReflectPass(PR); in LLVMInitializeNVPTXTarget()
79 initializeNVVMIntrRangePass(PR); in LLVMInitializeNVPTXTarget()
80 initializeGenericToNVVMPass(PR); in LLVMInitializeNVPTXTarget()
81 initializeNVPTXAllocaHoistingPass(PR); in LLVMInitializeNVPTXTarget()
82 initializeNVPTXAssignValidGlobalNamesPass(PR); in LLVMInitializeNVPTXTarget()
83 initializeNVPTXFavorNonGenericAddrSpacesPass(PR); in LLVMInitializeNVPTXTarget()
84 initializeNVPTXInferAddressSpacesPass(PR); in LLVMInitializeNVPTXTarget()
85 initializeNVPTXLowerKernelArgsPass(PR); in LLVMInitializeNVPTXTarget()
86 initializeNVPTXLowerAllocaPass(PR); in LLVMInitializeNVPTXTarget()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonTargetMachine.cpp | 187 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeHexagonTarget() local
188 initializeHexagonBitSimplifyPass(PR); in LLVMInitializeHexagonTarget()
189 initializeHexagonConstExtendersPass(PR); in LLVMInitializeHexagonTarget()
190 initializeHexagonConstPropagationPass(PR); in LLVMInitializeHexagonTarget()
191 initializeHexagonEarlyIfConversionPass(PR); in LLVMInitializeHexagonTarget()
192 initializeHexagonGenMuxPass(PR); in LLVMInitializeHexagonTarget()
193 initializeHexagonHardwareLoopsPass(PR); in LLVMInitializeHexagonTarget()
194 initializeHexagonLoopIdiomRecognizePass(PR); in LLVMInitializeHexagonTarget()
195 initializeHexagonVectorLoopCarriedReusePass(PR); in LLVMInitializeHexagonTarget()
196 initializeHexagonNewValueJumpPass(PR); in LLVMInitializeHexagonTarget()
[all …]
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonTargetMachine.cpp | 194 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeHexagonTarget() local
195 initializeHexagonBitSimplifyPass(PR); in LLVMInitializeHexagonTarget()
196 initializeHexagonConstExtendersPass(PR); in LLVMInitializeHexagonTarget()
197 initializeHexagonConstPropagationPass(PR); in LLVMInitializeHexagonTarget()
198 initializeHexagonEarlyIfConversionPass(PR); in LLVMInitializeHexagonTarget()
199 initializeHexagonGenMuxPass(PR); in LLVMInitializeHexagonTarget()
200 initializeHexagonHardwareLoopsPass(PR); in LLVMInitializeHexagonTarget()
201 initializeHexagonLoopIdiomRecognizeLegacyPassPass(PR); in LLVMInitializeHexagonTarget()
202 initializeHexagonVectorLoopCarriedReuseLegacyPassPass(PR); in LLVMInitializeHexagonTarget()
203 initializeHexagonNewValueJumpPass(PR); in LLVMInitializeHexagonTarget()
[all …]
|
| /external/llvm-project/llvm/lib/Target/NVPTX/ |
| D | NVPTXTargetMachine.cpp | 82 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeNVPTXTarget() local
83 initializeNVVMReflectPass(PR); in LLVMInitializeNVPTXTarget()
84 initializeNVVMIntrRangePass(PR); in LLVMInitializeNVPTXTarget()
85 initializeGenericToNVVMPass(PR); in LLVMInitializeNVPTXTarget()
86 initializeNVPTXAllocaHoistingPass(PR); in LLVMInitializeNVPTXTarget()
87 initializeNVPTXAssignValidGlobalNamesPass(PR); in LLVMInitializeNVPTXTarget()
88 initializeNVPTXLowerArgsPass(PR); in LLVMInitializeNVPTXTarget()
89 initializeNVPTXLowerAllocaPass(PR); in LLVMInitializeNVPTXTarget()
90 initializeNVPTXLowerAggrCopiesPass(PR); in LLVMInitializeNVPTXTarget()
91 initializeNVPTXProxyRegErasurePass(PR); in LLVMInitializeNVPTXTarget()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXTargetMachine.cpp | 82 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeNVPTXTarget() local
83 initializeNVVMReflectPass(PR); in LLVMInitializeNVPTXTarget()
84 initializeNVVMIntrRangePass(PR); in LLVMInitializeNVPTXTarget()
85 initializeGenericToNVVMPass(PR); in LLVMInitializeNVPTXTarget()
86 initializeNVPTXAllocaHoistingPass(PR); in LLVMInitializeNVPTXTarget()
87 initializeNVPTXAssignValidGlobalNamesPass(PR); in LLVMInitializeNVPTXTarget()
88 initializeNVPTXLowerArgsPass(PR); in LLVMInitializeNVPTXTarget()
89 initializeNVPTXLowerAllocaPass(PR); in LLVMInitializeNVPTXTarget()
90 initializeNVPTXLowerAggrCopiesPass(PR); in LLVMInitializeNVPTXTarget()
91 initializeNVPTXProxyRegErasurePass(PR); in LLVMInitializeNVPTXTarget()
|
| /external/llvm-project/llvm/lib/Target/BPF/ |
| D | BPFTargetMachine.cpp | 42 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeBPFTarget() local
43 initializeBPFAbstractMemberAccessLegacyPassPass(PR); in LLVMInitializeBPFTarget()
44 initializeBPFPreserveDITypePass(PR); in LLVMInitializeBPFTarget()
45 initializeBPFAdjustOptPass(PR); in LLVMInitializeBPFTarget()
46 initializeBPFCheckAndAdjustIRPass(PR); in LLVMInitializeBPFTarget()
47 initializeBPFMIPeepholePass(PR); in LLVMInitializeBPFTarget()
48 initializeBPFMIPeepholeTruncElimPass(PR); in LLVMInitializeBPFTarget()
|
| /external/tensorflow/tensorflow/lite/tools/evaluation/stages/utils/ |
| D | image_metrics_test.cc | 36 float MaxP(float minr, const std::vector<PR>& prs) { in MaxP()
44 float ExpectedAP(const std::vector<PR>& prs) { in ExpectedAP()
57 std::vector<PR> prs; in TEST()
72 std::vector<PR> prs; in TEST()
83 [](const PR& a, const PR& b) { return a.r < b.r; }); in TEST()
155 std::vector<PR> pr; in TEST()
|
| /external/flatbuffers/.github/ |
| D | PULL_REQUEST_TEMPLATE.md | 1 Thank you for submitting a PR!
5 Make sure you include the names of the affected language(s) in your PR title.
10 code changes in the PR. This allows us to better see the effect of the PR.
12 If your PR includes C++ code, please adhere to the Google C++ Style Guide,
|