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Searched refs:PUCRH (Results 1 – 3 of 3) sorted by relevance

/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_pwr_ex.c452 SET_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_EnableGPIOPullUp()
525 CLEAR_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_DisableGPIOPullUp()
611 CLEAR_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_EnableGPIOPullDown()
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_pwr_ex.c452 SET_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_EnableGPIOPullUp()
525 CLEAR_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_DisableGPIOPullUp()
611 CLEAR_BIT(PWR->PUCRH, (GPIONumber & PWR_PORTH_AVAILABLE_PINS)); in HAL_PWREx_EnableGPIOPullDown()
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
Dstm32l476xx.h671 __IO uint32_t PUCRH; /*!< Pull_up control register of portH, Address offset: 0x58 */ member