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Searched refs:RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK (Results 1 – 2 of 2) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_private.h1026 RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, enumerator
Dradv_cmd_buffer.c2505 RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK | in radv_cmd_buffer_flush_dynamic_state()
4455 state->dirty |= RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK; in radv_CmdSetStencilWriteMask()