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Searched refs:RCC (Results 1 – 25 of 56) sorted by relevance

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/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_rcc.h627 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \
629 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \
635 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \
637 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \
644 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \
646 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \
653 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \
655 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \
661 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
663 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
[all …]
Dstm32l4xx_hal_rcc_ex.h906 WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \
915 WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \
928 WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \
936 WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \
961 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N, (__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_…
978 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M, ((__PLLSAI1M__) - 1U) << RCC_PLLSAI1CFGR_PL…
998 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1PDIV, (__PLLSAI1P__) << RCC_PLLSAI1CFGR_PLLSAI…
1003 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P, ((__PLLSAI1P__) >> 4U) << RCC_PLLSAI1CFGR_P…
1020 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q, (((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI…
1035 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1R, (((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI…
[all …]
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_rcc.h627 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \
629 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \
635 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \
637 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \
644 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \
646 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \
653 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \
655 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \
661 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
663 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
[all …]
Dstm32l4xx_hal_rcc_ex.h906 WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \
915 WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \
928 WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \
936 WRITE_REG(RCC->PLLSAI1CFGR, ((__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | \
961 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N, (__PLLSAI1N__) << RCC_PLLSAI1CFGR_PLLSAI1N_…
978 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M, ((__PLLSAI1M__) - 1U) << RCC_PLLSAI1CFGR_PL…
998 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1PDIV, (__PLLSAI1P__) << RCC_PLLSAI1CFGR_PLLSAI…
1003 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P, ((__PLLSAI1P__) >> 4U) << RCC_PLLSAI1CFGR_P…
1020 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q, (((__PLLSAI1Q__) >> 1U) - 1U) << RCC_PLLSAI…
1035 …MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1R, (((__PLLSAI1R__) >> 1U) - 1U) << RCC_PLLSAI…
[all …]
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/
DNucleo-L4A6RG.ioc6 Mcu.IP1=RCC
109 ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-H…
110 RCC.ADCFreq_Value=64000000
111 RCC.AHBFreq_Value=80000000
112 RCC.APB1Freq_Value=80000000
113 RCC.APB1TimFreq_Value=80000000
114 RCC.APB2Freq_Value=80000000
115 RCC.APB2TimFreq_Value=80000000
116 RCC.CK48CLockSelection=RCC_USBCLKSOURCE_HSI48
117 RCC.CortexFreq_Value=80000000
[all …]
DNucleo-L4A6RG.txt9 RCC Crystal/Ceramic Resonator RCC_OSC32_IN PC14-OSC32_IN (PC14)
10 RCC Crystal/Ceramic Resonator RCC_OSC32_OUT PC15-OSC32_OUT (PC15)
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_rcc.c107 (MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__HAL_RCC_PLLSOURCE__)))
281 SET_BIT(RCC->CR, RCC_CR_MSION); in HAL_RCC_DeInit()
288 while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RESET) in HAL_RCC_DeInit()
297 MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, RCC_MSIRANGE_6); in HAL_RCC_DeInit()
300 CLEAR_REG(RCC->CFGR); in HAL_RCC_DeInit()
316 while(READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_MSI) in HAL_RCC_DeInit()
327 …CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | … in HAL_RCC_DeInit()
331 …CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | … in HAL_RCC_DeInit()
341 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY | RCC_CR_PLLSAI2RDY) != 0U) in HAL_RCC_DeInit()
345 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY) != 0U) in HAL_RCC_DeInit()
[all …]
Dstm32l4xx_hal_rcc_ex.c357 tmpregister = READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL); in HAL_RCCEx_PeriphCLKConfig()
362 tmpregister = READ_BIT(RCC->BDCR, ~(RCC_BDCR_RTCSEL)); in HAL_RCCEx_PeriphCLKConfig()
367 RCC->BDCR = tmpregister; in HAL_RCCEx_PeriphCLKConfig()
377 while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == RESET) in HAL_RCCEx_PeriphCLKConfig()
730 while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != RESET) in HAL_RCCEx_PeriphCLKConfig()
910 …PeriphClkInit->PLLSAI1.PLLSAI1Source = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC) >> RCC_PLLCFGR_P… in HAL_RCCEx_GetPeriphCLKConfig()
912 …PeriphClkInit->PLLSAI1.PLLSAI1M = (READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLL… in HAL_RCCEx_GetPeriphCLKConfig()
914 …PeriphClkInit->PLLSAI1.PLLSAI1M = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Po… in HAL_RCCEx_GetPeriphCLKConfig()
916 …PeriphClkInit->PLLSAI1.PLLSAI1N = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLS… in HAL_RCCEx_GetPeriphCLKConfig()
917 …PeriphClkInit->PLLSAI1.PLLSAI1P = ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P) >> RCC_PL… in HAL_RCCEx_GetPeriphCLKConfig()
[all …]
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_rcc.c107 (MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__HAL_RCC_PLLSOURCE__)))
281 SET_BIT(RCC->CR, RCC_CR_MSION); in HAL_RCC_DeInit()
288 while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == RESET) in HAL_RCC_DeInit()
297 MODIFY_REG(RCC->CR, RCC_CR_MSIRANGE, RCC_MSIRANGE_6); in HAL_RCC_DeInit()
300 CLEAR_REG(RCC->CFGR); in HAL_RCC_DeInit()
316 while(READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_MSI) in HAL_RCC_DeInit()
327 …CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | … in HAL_RCC_DeInit()
331 …CLEAR_BIT(RCC->CR, RCC_CR_HSEON | RCC_CR_HSION | RCC_CR_HSIKERON| RCC_CR_HSIASFS | RCC_CR_PLLON | … in HAL_RCC_DeInit()
341 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY | RCC_CR_PLLSAI2RDY) != 0U) in HAL_RCC_DeInit()
345 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY | RCC_CR_PLLSAI1RDY) != 0U) in HAL_RCC_DeInit()
[all …]
Dstm32l4xx_hal_rcc_ex.c357 tmpregister = READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL); in HAL_RCCEx_PeriphCLKConfig()
362 tmpregister = READ_BIT(RCC->BDCR, ~(RCC_BDCR_RTCSEL)); in HAL_RCCEx_PeriphCLKConfig()
367 RCC->BDCR = tmpregister; in HAL_RCCEx_PeriphCLKConfig()
377 while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == RESET) in HAL_RCCEx_PeriphCLKConfig()
730 while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != RESET) in HAL_RCCEx_PeriphCLKConfig()
910 …PeriphClkInit->PLLSAI1.PLLSAI1Source = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC) >> RCC_PLLCFGR_P… in HAL_RCCEx_GetPeriphCLKConfig()
912 …PeriphClkInit->PLLSAI1.PLLSAI1M = (READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1M) >> RCC_PLL… in HAL_RCCEx_GetPeriphCLKConfig()
914 …PeriphClkInit->PLLSAI1.PLLSAI1M = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Po… in HAL_RCCEx_GetPeriphCLKConfig()
916 …PeriphClkInit->PLLSAI1.PLLSAI1N = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> RCC_PLLS… in HAL_RCCEx_GetPeriphCLKConfig()
917 …PeriphClkInit->PLLSAI1.PLLSAI1P = ((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P) >> RCC_PL… in HAL_RCCEx_GetPeriphCLKConfig()
[all …]
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/
DNucleo-L476RG.ioc6 Mcu.IP1=RCC
143 ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-H…
144 RCC.ADCFreq_Value=64000000
145 RCC.AHBFreq_Value=80000000
146 RCC.APB1Freq_Value=80000000
147 RCC.APB1TimFreq_Value=80000000
148 RCC.APB2Freq_Value=80000000
149 RCC.APB2TimFreq_Value=80000000
150 RCC.CK48CLockSelection=RCC_USBCLKSOURCE_MSI
151 RCC.CortexFreq_Value=80000000
[all …]
DNucleo-L476RG.txt9 RCC Crystal/Ceramic Resonator RCC_OSC32_IN PC14-OSC32_IN (PC14)
10 RCC Crystal/Ceramic Resonator RCC_OSC32_OUT PC15-OSC32_OUT (PC15)
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Src/
Dsystem_stm32l4xx.c205 RCC->CR |= RCC_CR_MSION; in SystemInit()
208 RCC->CFGR = 0x00000000U; in SystemInit()
211 RCC->CR &= 0xEAF6FFFFU; in SystemInit()
214 RCC->PLLCFGR = 0x00001000U; in SystemInit()
217 RCC->CR &= 0xFFFBFFFFU; in SystemInit()
220 RCC->CIER = 0x00000000U; in SystemInit()
277 if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) in SystemCoreClockUpdate()
279 msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; in SystemCoreClockUpdate()
283 msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; in SystemCoreClockUpdate()
289 switch (RCC->CFGR & RCC_CFGR_SWS) in SystemCoreClockUpdate()
[all …]
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Src/
Dsystem_stm32l4xx.c205 RCC->CR |= RCC_CR_MSION; in SystemInit()
208 RCC->CFGR = 0x00000000U; in SystemInit()
211 RCC->CR &= 0xEAF6FFFFU; in SystemInit()
214 RCC->PLLCFGR = 0x00001000U; in SystemInit()
217 RCC->CR &= 0xFFFBFFFFU; in SystemInit()
220 RCC->CIER = 0x00000000U; in SystemInit()
277 if((RCC->CR & RCC_CR_MSIRGSEL) == RESET) in SystemCoreClockUpdate()
279 msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; in SystemCoreClockUpdate()
283 msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; in SystemCoreClockUpdate()
289 switch (RCC->CFGR & RCC_CFGR_SWS) in SystemCoreClockUpdate()
[all …]
/external/wpa_supplicant_8/wpa_supplicant/wpa_gui-qt4/
Dicons.qrc1 <RCC>
9 </RCC>
Dicons_png.qrc1 <RCC>
9 </RCC>
/external/llvm-project/clang/lib/StaticAnalyzer/Core/
DExprEngineCXX.cpp219 const auto *RCC = cast<ReturnedValueConstructionContext>(CC); in computeObjectUnderConstruction() local
223 const Expr *RetE = RCC->getReturnStmt()->getRetValue(); in computeObjectUnderConstruction()
/external/stressapptest/
Dconfigure3059 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
3103 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp2535 ISD::CondCode RCC = cast<CondCodeSDNode>(RHS.getOperand(2))->get(); in performAndCombine() local
2546 if (RCC == ISD::SETUNE) { in performAndCombine()
/external/libsrtp2/
Dconfigure3311 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
3355 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
/external/google-breakpad/
Dconfigure5339 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
5383 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
/external/icu/icu4c/source/
Dconfigure.ac153 AC_PROG_CXX([clang++ g++ c++ gpp xlC_r xlC aCC CC cxx cc++ cl.exe icc FCC KCC RCC])
Dconfigure3518 for ac_prog in clang++ g++ c++ gpp xlC_r xlC aCC CC cxx cc++ cl.exe icc FCC KCC RCC
3562 for ac_prog in clang++ g++ c++ gpp xlC_r xlC aCC CC cxx cc++ cl.exe icc FCC KCC RCC
/external/libpcap/
Dconfigure3655 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
3699 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC
/external/expat/
Dconfigure13995 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC clang++
14044 for ac_prog in g++ c++ gpp aCC CC cxx cc++ cl.exe FCC KCC RCC xlC_r xlC clang++
16416 RCC*)

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