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Searched refs:RCC_CFGR_HPRE_DIV8 (Results 1 – 3 of 3) sorted by relevance

/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_rcc.h449 #define RCC_SYSCLK_DIV8 RCC_CFGR_HPRE_DIV8 /*!< SYSCLK divided by 8 */
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_rcc.h449 #define RCC_SYSCLK_DIV8 RCC_CFGR_HPRE_DIV8 /*!< SYSCLK divided by 8 */
/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
Dstm32l476xx.h10679 #define RCC_CFGR_HPRE_DIV8 (0x000000A0U) /*!< SYSCLK divided … macro