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Searched refs:RCIdx (Results 1 – 5 of 5) sorted by relevance

/external/llvm-project/llvm/lib/CodeGen/
DRegAllocFast.cpp1030 for (unsigned RCIdx = 0, RCIdxEnd = TRI->getNumRegClasses(); in addRegClassDefCounts() local
1031 RCIdx != RCIdxEnd; ++RCIdx) { in addRegClassDefCounts()
1032 const TargetRegisterClass *IdxRC = TRI->getRegClass(RCIdx); in addRegClassDefCounts()
1035 ++RegClassDefCounts[RCIdx]; in addRegClassDefCounts()
1041 for (unsigned RCIdx = 0, RCIdxEnd = TRI->getNumRegClasses(); in addRegClassDefCounts() local
1042 RCIdx != RCIdxEnd; ++RCIdx) { in addRegClassDefCounts()
1043 const TargetRegisterClass *IdxRC = TRI->getRegClass(RCIdx); in addRegClassDefCounts()
1046 ++RegClassDefCounts[RCIdx]; in addRegClassDefCounts()
/external/llvm-project/llvm/utils/TableGen/
DCodeGenRegisters.h779 ArrayRef<unsigned> getRCPressureSetIDs(unsigned RCIdx) const { in getRCPressureSetIDs() argument
780 return RegClassUnitSets[RCIdx]; in getRCPressureSetIDs()
DCodeGenRegisters.cpp2000 int RCIdx = -1; in computeRegUnitSets() local
2002 ++RCIdx; in computeRegUnitSets()
2024 RegClassUnitSets[RCIdx].push_back(USIdx); in computeRegUnitSets()
2028 assert(!RegClassUnitSets[RCIdx].empty() && "missing unit set for regclass"); in computeRegUnitSets()
/external/llvm/utils/TableGen/
DCodeGenRegisters.h705 ArrayRef<unsigned> getRCPressureSetIDs(unsigned RCIdx) const { in getRCPressureSetIDs() argument
706 return RegClassUnitSets[RCIdx]; in getRCPressureSetIDs()
DCodeGenRegisters.cpp1719 int RCIdx = -1; in computeRegUnitSets() local
1721 ++RCIdx; in computeRegUnitSets()
1743 RegClassUnitSets[RCIdx].push_back(USIdx); in computeRegUnitSets()
1747 assert(!RegClassUnitSets[RCIdx].empty() && "missing unit set for regclass"); in computeRegUnitSets()