| /external/llvm/test/CodeGen/X86/ |
| D | abi-isel.ll | 58 ; LINUX-64-PIC-NEXT: movq dst@GOTPCREL(%rip), [[RCX:%r..]]
59 ; LINUX-64-PIC-NEXT: movl [[EAX]], ([[RCX]])
87 ; DARWIN-64-STATIC-NEXT: movq _dst@GOTPCREL(%rip), [[RCX:%r..]]
88 ; DARWIN-64-STATIC-NEXT: movl [[EAX]], ([[RCX]])
94 ; DARWIN-64-DYNAMIC-NEXT: movq _dst@GOTPCREL(%rip), [[RCX:%r..]]
95 ; DARWIN-64-DYNAMIC-NEXT: movl [[EAX]], ([[RCX]])
101 ; DARWIN-64-PIC-NEXT: movq _dst@GOTPCREL(%rip), [[RCX:%r..]]
102 ; DARWIN-64-PIC-NEXT: movl [[EAX]], ([[RCX]])
130 ; LINUX-64-PIC-NEXT: movq xdst@GOTPCREL(%rip), [[RCX:%r.x]]
131 ; LINUX-64-PIC-NEXT: movl [[EAX]], ([[RCX]])
[all …]
|
| D | fp-stack-O0.ll | 11 ; CHECK-NEXT: movq %rsp, [[RCX:%r..]]
14 ; CHECK-NEXT: fstpt 16([[RCX]])
16 ; CHECK-NEXT: fstpt ([[RCX]])
|
| D | or-address.ll | 50 ; CHECK: movl %{{.*}}, (%[[RDI:...]],%[[RCX:...]],4)
51 ; CHECK: movl %{{.*}}, 8(%[[RDI]],%[[RCX]],4)
52 ; CHECK: movl %{{.*}}, 4(%[[RDI]],%[[RCX]],4)
53 ; CHECK: movl %{{.*}}, 12(%[[RDI]],%[[RCX]],4)
|
| D | 2009-09-19-earlyclobber.ll | 4 ; Registers other than RAX, RCX are OK, but they must be different.
|
| D | ipra-inline-asm.ll | 14 ; CHECK: foo Clobbered Registers: AH AL AX CH CL CX DI DIL EAX ECX EDI RAX RCX RDI
|
| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | fp-stack-O0.ll | 11 ; CHECK-NEXT: movq %rsp, [[RCX:%r..]]
14 ; CHECK-NEXT: fstpt 16([[RCX]])
16 ; CHECK-NEXT: fstpt ([[RCX]])
|
| D | or-address.ll | 50 ; CHECK: movl %{{.*}}, (%[[RDI:...]],%[[RCX:...]],4)
51 ; CHECK: movl %{{.*}}, 8(%[[RDI]],%[[RCX]],4)
52 ; CHECK: movl %{{.*}}, 4(%[[RDI]],%[[RCX]],4)
53 ; CHECK: movl %{{.*}}, 12(%[[RDI]],%[[RCX]],4)
|
| D | 2009-09-19-earlyclobber.ll | 4 ; Registers other than RAX, RCX are OK, but they must be different.
|
| /external/llvm-project/llvm/test/MC/X86/ |
| D | intel-syntax.s | 21 lea RDX, [8 + RAX * 8 + RCX]
23 lea RDX, [number + 8 * RAX + RCX]
43 lea RDX, [number + RAX * number + RCX]
51 lea RDX, [8 + number * RAX + RCX]
89 mov RCX, QWORD PTR [0]
93 mov BYTE PTR [RDX + RCX], DIL
95 movzx EDI, WORD PTR [RCX + 2]
519 xchg RAX, RCX
520 xchg RCX, RAX
|
| /external/llvm/lib/Target/X86/ |
| D | X86SelectionDAGInfo.cpp | 57 const MCPhysReg ClobberSet[] = {X86::RCX, X86::RAX, X86::RDI, in EmitTargetCodeForMemset()
153 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX, in EmitTargetCodeForMemset()
171 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX : X86::ECX, in EmitTargetCodeForMemset()
224 const MCPhysReg ClobberSet[] = {X86::RCX, X86::RSI, X86::RDI, in EmitTargetCodeForMemcpy()
247 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX, in EmitTargetCodeForMemcpy()
|
| D | X86CallingConv.td | 41 CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX]>>,
204 CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX, R8]>>,
233 CCIfType<[i64], CCAssignToReg<[RBX, RBP, RDI, RSI, RDX, RCX, R8, R9,
312 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
374 RDI, RSI, RDX, RCX, R8, R9,
415 // Do not pass the sret argument in RCX, the Win64 thiscall calling
416 // convention requires "this" to be passed in RCX.
421 CCIfType<[i64], CCAssignToRegWithShadow<[RCX , RDX , R8 , R9 ],
427 [RCX , RDX , R8 , R9 ]>>,
476 CCIfType<[i64], CCAssignToReg<[R15, RBP, RSI, RDX, RCX, R8]>>,
[all …]
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 109 X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RBP, X86::RSP, in initLLVMToSEHAndCVRegMapping()
297 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
309 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
346 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
382 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
418 case X86::CH: case X86::CL: case X86::CX: case X86::ECX: case X86::RCX: in getX86SubSuperRegisterOrZero()
419 return X86::RCX; in getX86SubSuperRegisterOrZero()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86SelectionDAGInfo.cpp | 56 const MCPhysReg ClobberSet[] = {X86::RCX, X86::RAX, X86::RDI, in EmitTargetCodeForMemset()
155 Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RCX : X86::ECX, in EmitTargetCodeForMemset()
190 const unsigned CX = Use64BitRegs ? X86::RCX : X86::ECX; in emitRepmovs()
302 const MCPhysReg ClobberSet[] = {X86::RCX, X86::RSI, X86::RDI, in EmitTargetCodeForMemcpy()
|
| D | X86RegisterBanks.td | 12 /// General Purpose Registers: RAX, RCX,...
|
| D | X86CallingConv.td | 64 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R10, R11, R12, R14, R15];
71 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R12, R13, R14, R15];
221 CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX]>>,
395 CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX, R8]>>,
424 CCIfType<[i64], CCAssignToReg<[RBX, RBP, RDI, RSI, RDX, RCX, R8, R9,
523 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
585 RDI, RSI, RDX, RCX, R8, R9,
640 [RCX , RDX , R8 , R9 ]>>,
650 // Do not pass the sret argument in RCX, the Win64 thiscall calling
651 // convention requires "this" to be passed in RCX.
[all …]
|
| /external/llvm-project/llvm/test/tools/llvm-dwarfdump/X86/ |
| D | debug_loclists.s | 16 # REGULAR-NEXT: [0x0000000000000002, 0x0000000000000003): DW_OP_reg2 RCX
17 # VERBOSE-NEXT: [0x0000000000000002, 0x0000000000000003) ".text": DW_OP_reg2 RCX
39 # BOTH-NEXT: DW_LLE_offset_pair (0x0000000000000002, 0x0000000000000003): DW_OP_reg2 RCX
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86SelectionDAGInfo.cpp | 61 const MCPhysReg ClobberSet[] = {X86::RCX, X86::RAX, X86::RDI, in EmitTargetCodeForMemset()
159 Chain = DAG.getCopyToReg(Chain, dl, Use64BitRegs ? X86::RCX : X86::ECX, in EmitTargetCodeForMemset()
193 const unsigned CX = Use64BitRegs ? X86::RCX : X86::ECX; in emitRepmovs()
305 const MCPhysReg ClobberSet[] = {X86::RCX, X86::RSI, X86::RDI, in EmitTargetCodeForMemcpy()
|
| D | X86RegisterBanks.td | 12 /// General Purpose Registers: RAX, RCX,...
|
| D | X86CallingConv.td | 64 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R10, R11, R12, R14, R15];
71 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R12, R13, R14, R15];
221 CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX]>>,
398 CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX, R8]>>,
427 CCIfType<[i64], CCAssignToReg<[RBX, RBP, RDI, RSI, RDX, RCX, R8, R9,
529 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
591 RDI, RSI, RDX, RCX, R8, R9,
646 [RCX , RDX , R8 , R9 ]>>,
656 // Do not pass the sret argument in RCX, the Win64 thiscall calling
657 // convention requires "this" to be passed in RCX.
[all …]
|
| /external/strace/linux/x86_64/ |
| D | arch_regs.h | 16 #define RCX 11 macro
|
| D | userent.h | 12 XLAT(8*RCX),
|
| /external/llvm/test/MC/X86/ |
| D | intel-syntax.s | 25 mov RCX, QWORD PTR [0]
29 mov BYTE PTR [RDX + RCX], DIL
31 movzx EDI, WORD PTR [RCX + 2]
453 xchg RAX, RCX
454 xchg RCX, RAX
|
| /external/kernel-headers/original/uapi/asm-x86/asm/ |
| D | ptrace-abi.h | 45 #define RCX 88 macro
|
| /external/llvm/test/DebugInfo/X86/ |
| D | dw_op_minus.ll | 65 ; RCX - 400
74 ; RCX is clobbered in call @Capture, but there is a spilled copy.
|
| /external/llvm-project/llvm/test/tools/llvm-exegesis/X86/ |
| D | analysis-clustering-algorithms.test | 194 - 'ROL64ri RCX RCX i_0x1'
211 - 'RCX=0x0'
|