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Searched refs:REG_NR (Results 1 – 7 of 7) sorted by relevance

/external/igt-gpu-tools/lib/
Di915_3d.h298 #define REG_NR(reg) ((reg) & REG_NR_MASK) macro
361 (REG_NR(reg) << D0_NR_SHIFT) | \
371 (REG_NR(dest_reg) << T0_DEST_NR_SHIFT) | \
372 (REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT)); \
374 (REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT)); \
382 (REG_NR(dest_reg) << T0_DEST_NR_SHIFT) | \
383 (REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT)); \
385 (REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT)); \
400 (REG_NR(dest_reg) << A0_DEST_NR_SHIFT) | \
405 (REG_NR(operand0) << A0_SRC0_NR_SHIFT)); \
[all …]
Drendercopy_i915.c186 REG_NR(FS_T0) << D0_NR_SHIFT | in gen3_render_copyfunc()
193 (REG_NR(FS_S0) << D0_NR_SHIFT) | in gen3_render_copyfunc()
200 (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | in gen3_render_copyfunc()
201 (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); in gen3_render_copyfunc()
203 (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); in gen3_render_copyfunc()
/external/igt-gpu-tools/tests/i915/
Dgen3_render_linear_blits.c199 REG_NR(FS_T0) << D0_NR_SHIFT | in copy()
206 (REG_NR(FS_S0) << D0_NR_SHIFT) | in copy()
213 (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | in copy()
214 (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); in copy()
216 (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); in copy()
Dgen3_render_tiledy_blits.c199 REG_NR(FS_T0) << D0_NR_SHIFT | in copy()
206 (REG_NR(FS_S0) << D0_NR_SHIFT) | in copy()
213 (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | in copy()
214 (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); in copy()
216 (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); in copy()
Dgen3_render_tiledx_blits.c199 REG_NR(FS_T0) << D0_NR_SHIFT | in copy()
206 (REG_NR(FS_S0) << D0_NR_SHIFT) | in copy()
213 (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | in copy()
214 (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); in copy()
216 (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); in copy()
Dgen3_render_mixed_blits.c212 REG_NR(FS_T0) << D0_NR_SHIFT | in copy()
219 (REG_NR(FS_S0) << D0_NR_SHIFT) | in copy()
226 (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | in copy()
227 (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); in copy()
229 (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); in copy()
Dgen3_mixed_blits.c225 REG_NR(FS_T0) << D0_NR_SHIFT | in render_copy()
232 (REG_NR(FS_S0) << D0_NR_SHIFT) | in render_copy()
239 (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | in render_copy()
240 (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); in render_copy()
242 (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); in render_copy()