Searched refs:REG_NR (Results 1 – 7 of 7) sorted by relevance
298 #define REG_NR(reg) ((reg) & REG_NR_MASK) macro361 (REG_NR(reg) << D0_NR_SHIFT) | \371 (REG_NR(dest_reg) << T0_DEST_NR_SHIFT) | \372 (REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT)); \374 (REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT)); \382 (REG_NR(dest_reg) << T0_DEST_NR_SHIFT) | \383 (REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT)); \385 (REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT)); \400 (REG_NR(dest_reg) << A0_DEST_NR_SHIFT) | \405 (REG_NR(operand0) << A0_SRC0_NR_SHIFT)); \[all …]
186 REG_NR(FS_T0) << D0_NR_SHIFT | in gen3_render_copyfunc()193 (REG_NR(FS_S0) << D0_NR_SHIFT) | in gen3_render_copyfunc()200 (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | in gen3_render_copyfunc()201 (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); in gen3_render_copyfunc()203 (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); in gen3_render_copyfunc()
199 REG_NR(FS_T0) << D0_NR_SHIFT | in copy()206 (REG_NR(FS_S0) << D0_NR_SHIFT) | in copy()213 (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | in copy()214 (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); in copy()216 (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); in copy()
212 REG_NR(FS_T0) << D0_NR_SHIFT | in copy()219 (REG_NR(FS_S0) << D0_NR_SHIFT) | in copy()226 (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | in copy()227 (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); in copy()229 (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); in copy()
225 REG_NR(FS_T0) << D0_NR_SHIFT | in render_copy()232 (REG_NR(FS_S0) << D0_NR_SHIFT) | in render_copy()239 (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) | in render_copy()240 (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT)); in render_copy()242 (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT)); in render_copy()