Searched refs:R_028A18_VGT_HOS_MAX_TESS_LEVEL (Results 1 – 5 of 5) sorted by relevance
| /external/mesa3d/src/amd/common/ |
| D | ac_shadowed_regs.c | 116 R_028A18_VGT_HOS_MAX_TESS_LEVEL,
117 R_028A1C_VGT_HOS_MIN_TESS_LEVEL - R_028A18_VGT_HOS_MAX_TESS_LEVEL + 4,
331 R_028A18_VGT_HOS_MAX_TESS_LEVEL,
332 R_028A1C_VGT_HOS_MIN_TESS_LEVEL - R_028A18_VGT_HOS_MAX_TESS_LEVEL + 4,
659 R_028A18_VGT_HOS_MAX_TESS_LEVEL,
660 R_028A1C_VGT_HOS_MIN_TESS_LEVEL - R_028A18_VGT_HOS_MAX_TESS_LEVEL + 4,
1517 set_context_reg_seq_array(cs, R_028A18_VGT_HOS_MAX_TESS_LEVEL, SET(VgtHosMaxTessLevelGfx9)); in gfx9_emulate_clear_state()
2220 set_context_reg_seq_array(cs, R_028A18_VGT_HOS_MAX_TESS_LEVEL, SET(VgtHosMaxTessLevelNv10)); in gfx10_emulate_clear_state()
2919 set_context_reg_seq_array(cs, R_028A18_VGT_HOS_MAX_TESS_LEVEL, SET(VgtHosMaxTessLevelGfx103)); in gfx103_emulate_clear_state()
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| /external/mesa3d/src/amd/vulkan/ |
| D | si_cmd_buffer.c | 202 radeon_set_context_reg(cs, R_028A18_VGT_HOS_MAX_TESS_LEVEL, fui(64)); in si_emit_graphics()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | evergreend.h | 2240 #define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x00028A18 macro
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| D | r600d.h | 3129 #define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x028A18 macro
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_state.c | 5093 si_pm4_set_reg(pm4, R_028A18_VGT_HOS_MAX_TESS_LEVEL, fui(64)); in si_init_cs_preamble_state()
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