Searched refs:RegBankID (Results 1 – 6 of 6) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMRegisterBankInfo.cpp | 50 unsigned RegBankID) { in checkPartMapping() argument
52 PM.RegBank->getID() == RegBankID; in checkPartMapping()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMRegisterBankInfo.cpp | 50 unsigned RegBankID) { in checkPartMapping() argument
52 PM.RegBank->getID() == RegBankID; in checkPartMapping()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterBankInfo.cpp | 155 AArch64::RBNameDst##RegBankID, AArch64::RBNameSrc##RegBankID, Size); \ in AArch64RegisterBankInfo()
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| D | AArch64InstructionSelector.cpp | 365 unsigned RegBankID = RB.getID(); in getMinClassForRegBank() local
367 if (RegBankID == AArch64::GPRRegBankID) { in getMinClassForRegBank()
376 if (RegBankID == AArch64::FPRRegBankID) { in getMinClassForRegBank()
476 static unsigned selectBinaryOp(unsigned GenericOpc, unsigned RegBankID, in selectBinaryOp() argument
478 switch (RegBankID) { in selectBinaryOp()
547 static unsigned selectLoadStoreUIOp(unsigned GenericOpc, unsigned RegBankID, in selectLoadStoreUIOp() argument
550 switch (RegBankID) { in selectLoadStoreUIOp()
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| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64RegisterBankInfo.cpp | 156 AArch64::RBNameDst##RegBankID, AArch64::RBNameSrc##RegBankID, Size); \ in AArch64RegisterBankInfo()
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| D | AArch64InstructionSelector.cpp | 491 unsigned RegBankID = RB.getID(); in getMinClassForRegBank() local
493 if (RegBankID == AArch64::GPRRegBankID) { in getMinClassForRegBank()
502 if (RegBankID == AArch64::FPRRegBankID) { in getMinClassForRegBank()
635 static unsigned selectBinaryOp(unsigned GenericOpc, unsigned RegBankID, in selectBinaryOp() argument
637 switch (RegBankID) { in selectBinaryOp()
706 static unsigned selectLoadStoreUIOp(unsigned GenericOpc, unsigned RegBankID, in selectLoadStoreUIOp() argument
709 switch (RegBankID) { in selectLoadStoreUIOp()
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