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Searched refs:RegId (Results 1 – 23 of 23) sorted by relevance

/external/rust/crates/gdbstub/src/arch/mips/
Dmod.rs4 use crate::arch::RegId;
12 pub enum Mips<RegIdImpl: RegId = reg::id::MipsRegId<u32>> {
21 pub enum Mips64<RegIdImpl: RegId = reg::id::MipsRegId<u64>> {
32 impl<RegIdImpl: RegId> Arch for Mips<RegIdImpl> {
35 type RegId = RegIdImpl; typedef
42 impl<RegIdImpl: RegId> Arch for Mips64<RegIdImpl> {
45 type RegId = RegIdImpl; typedef
55 type RegId = reg::id::MipsRegId<u32>; typedef
67 type RegId = reg::id::MipsRegId<u64>; typedef
/external/rust/crates/gdbstub/src/arch/x86/
Dmod.rs4 use crate::arch::RegId;
13 pub enum X86_64_SSE<RegIdImpl: RegId = reg::id::X86_64CoreRegId> {
18 impl<RegIdImpl: RegId> Arch for X86_64_SSE<RegIdImpl> {
21 type RegId = RegIdImpl; typedef
35 pub enum X86_SSE<RegIdImpl: RegId = reg::id::X86CoreRegId> {
40 impl<RegIdImpl: RegId> Arch for X86_SSE<RegIdImpl> {
43 type RegId = RegIdImpl; typedef
/external/rust/crates/gdbstub/src/arch/ppc/
Dmod.rs4 use crate::arch::RegId;
12 pub enum PowerPcAltivec32<RegIdImpl: RegId> {
17 impl<RegIdImpl: RegId> Arch for PowerPcAltivec32<RegIdImpl> {
20 type RegId = RegIdImpl; typedef
/external/rust/crates/gdbstub/src/arch/msp430/
Dmod.rs4 use crate::arch::RegId;
12 pub enum Msp430<RegIdImpl: RegId = reg::id::Msp430RegId> {
17 impl<RegIdImpl: RegId> Arch for Msp430<RegIdImpl> {
20 type RegId = RegIdImpl; typedef
/external/rust/crates/gdbstub/src/arch/
Dtraits.rs10 pub trait RegId: Sized + Debug { interface
18 impl RegId for () { implementation
64 type RegId: RegId; typedef
/external/rust/crates/gdbstub/src/arch/msp430/reg/
Did.rs1 use crate::arch::RegId;
22 impl RegId for Msp430RegId {
38 use crate::arch::traits::RegId;
41 fn test<Rs: Registers, RId: RegId>() { in test() argument
/external/rust/crates/gdbstub/src/arch/mips/reg/
Did.rs1 use crate::arch::RegId;
75 impl RegId for MipsRegId<u32> {
81 impl RegId for MipsRegId<u64> {
89 use crate::arch::traits::RegId;
92 fn test<Rs: Registers, RId: RegId>() { in test() argument
/external/rust/crates/gdbstub/src/arch/x86/reg/
Did.rs1 use crate::arch::RegId;
82 impl RegId for X86CoreRegId {
137 impl RegId for X86_64CoreRegId {
161 use crate::arch::traits::RegId;
167 fn test<Rs: Registers, RId: RegId>() { in test() argument
/external/rust/crates/gdbstub/src/arch/riscv/
Dmod.rs18 type RegId = reg::id::RiscvRegId; typedef
28 type RegId = reg::id::RiscvRegId; typedef
/external/rust/crates/gdbstub/src/arch/arm/reg/
Did.rs1 use crate::arch::RegId;
23 impl RegId for ArmCoreRegId {
/external/rust/crates/gdbstub/src/arch/riscv/reg/
Did.rs1 use crate::arch::RegId;
19 impl RegId for RiscvRegId {
/external/rust/crates/gdbstub/src/target/ext/base/
Dsinglethread.rs72 reg_id: <Self::Arch as Arch>::RegId, in read_register() argument
94 reg_id: <Self::Arch as Arch>::RegId, in write_register() argument
Dmultithread.rs118 reg_id: <Self::Arch as Arch>::RegId, in read_register() argument
141 reg_id: <Self::Arch as Arch>::RegId, in write_register() argument
/external/rust/crates/gdbstub/
DCHANGELOG.md23 - Implement `RegId` for Mips/Mips64 [\#38](https://github.com/daniel5151/gdbstub/pull/38) ([starf…
24 - Implement `RegId` for MSP430 [\#38](https://github.com/daniel5151/gdbstub/pull/38) ([starfleetc…
36 - Implement `RegId` for x86/x86_64 [\#34](https://github.com/daniel5151/gdbstub/pull/34) ([keiich…
63 …t `Registers::RegId` to `Arch::RegId`, and introduce new temporary `RegIdImpl` solution for avoidi…
64 - Mark various `RegId` enums as `#[non_exhaustive]`, allowing more registers to be added if need …
DREADME.md36 …es has required making some breaking Trait/Type changes (e.g: adding the `RegId` associated type t…
/external/rust/crates/gdbstub/src/arch/arm/
Dmod.rs13 type RegId = reg::id::ArmCoreRegId; typedef
/external/llvm/lib/Target/AMDGPU/Disassembler/
DAMDGPUDisassembler.h46 MCOperand createRegOperand(unsigned int RegId) const;
DAMDGPUDisassembler.cpp179 MCOperand AMDGPUDisassembler::createRegOperand(unsigned int RegId) const { in createRegOperand()
180 return MCOperand::createReg(RegId); in createRegOperand()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Disassembler/
DAMDGPUDisassembler.h60 MCOperand createRegOperand(unsigned int RegId) const;
DAMDGPUDisassembler.cpp609 MCOperand AMDGPUDisassembler::createRegOperand(unsigned int RegId) const { in createRegOperand()
610 return MCOperand::createReg(AMDGPU::getMCReg(RegId, STI)); in createRegOperand()
/external/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
DAMDGPUDisassembler.h61 MCOperand createRegOperand(unsigned int RegId) const;
DAMDGPUDisassembler.cpp651 MCOperand AMDGPUDisassembler::createRegOperand(unsigned int RegId) const { in createRegOperand()
652 return MCOperand::createReg(AMDGPU::getMCReg(RegId, STI)); in createRegOperand()
/external/rust/crates/gdbstub/src/gdbstub_impl/
Dmod.rs10 arch::{Arch, RegId, Registers},
541 let reg = <T::Arch as Arch>::RegId::from_raw_id(p.reg_id); in handle_base()
560 let reg = <T::Arch as Arch>::RegId::from_raw_id(p.reg_id); in handle_base()