| /external/llvm/test/CodeGen/X86/ |
| D | win64_frame.ll | 2 ; RUN: llc < %s -mtriple=x86_64-pc-win32 -mattr=+sahf | FileCheck %s --check-prefix=SAHF
160 ; SAHF: lock cmpxchgq
161 ; SAHF-NEXT: seto %al
162 ; SAHF-NEXT: lahf
171 ; SAHF: callq dummy
172 ; SAHF-NEXT: pushq
173 ; SAHF: addb $127, %al
174 ; SAHF-NEXT: sahf
175 ; SAHF-NEXT: popq
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| D | eflags-copy-expansion.mir | 57 ; CHECK-NEXT: SAHF implicit-def %eflags, implicit %ah
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| /external/llvm-project/llvm/include/llvm/Support/ |
| D | X86TargetParser.def | 177 X86_FEATURE (SAHF, "sahf")
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 523 SAHF, enumerator
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| D | X86.td | 200 "Support LAHF and SAHF instructions">;
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| D | X86SchedHaswell.td | 502 // LAHF SAHF.
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| D | X86InstrInfo.td | 145 def X86sahf : SDNode<"X86ISD::SAHF", SDTX86sahf>;
1584 def SAHF : I<0x9E, RawFrm, (outs), (ins), "sahf",
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| D | X86InstrInfo.cpp | 4581 BuildMI(MBB, MI, DL, get(X86::SAHF)); in copyPhysReg()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 548 SAHF, enumerator
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| D | X86.td | 235 "Support LAHF and SAHF instructions">;
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| D | X86ScheduleBdVer2.td | 525 def : InstRW<[PdWriteSAHF], (instrs SAHF)>;
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| D | X86InstrInfo.td | 155 def X86sahf : SDNode<"X86ISD::SAHF", SDTX86sahf>;
1791 def SAHF : I<0x9E, RawFrm, (outs), (ins), "sahf",
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| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | flags-copy-lowering.mir | 3 # Lower various interesting copy patterns of EFLAGS without using LAHF/SAHF.
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 5306 SDValue SAHF = SDValue( in Select() local
5307 CurDAG->getMachineNode(X86::SAHF, dl, MVT::i32, AH.getValue(1)), 0); in Select()
5312 ReplaceUses(SDValue(Node, 0), SAHF); in Select()
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| D | X86ScheduleBdVer2.td | 525 def : InstRW<[PdWriteSAHF], (instrs SAHF)>;
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| D | X86.td | 241 "Support LAHF and SAHF instructions in 64-bit mode">;
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| D | X86InstrInfo.td | 1858 def SAHF : I<0x9E, RawFrm, (outs), (ins), "sahf", []>, // flags = AH
|
| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 600 #define SAHF CHOICE(sahf, sahf, sahf) macro
1313 #define SAHF sahf macro
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenSubtargetInfo.inc | 252 …{ "sahf", "Support LAHF and SAHF instructions", X86::FeatureLAHFSAHF, { { { 0x0ULL, 0x0ULL, 0x0ULL…
6702 {DBGFIELD("SAHF") 1, false, false, 3, 1, 3, 1, 0, 0}, // #1013
8079 {DBGFIELD("SAHF") 2, false, false, 79, 2, 3, 1, 0, 0}, // #1013
9456 {DBGFIELD("SAHF") 1, false, false, 730, 4, 1, 1, 0, 0}, // #1013
10833 {DBGFIELD("SAHF") 1, false, false, 1, 1, 1, 1, 0, 0}, // #1013
12210 {DBGFIELD("SAHF") 1, false, false, 730, 4, 1, 1, 0, 0}, // #1013
13587 {DBGFIELD("SAHF") 1, false, false, 1038, 3, 1, 1, 0, 0}, // #1013
14964 {DBGFIELD("SAHF") 1, false, false, 730, 4, 1, 1, 0, 0}, // #1013
16341 {DBGFIELD("SAHF") 1, false, false, 188, 1, 1, 1, 0, 0}, // #1013
17718 {DBGFIELD("SAHF") 1, false, false, 730, 4, 1, 1, 0, 0}, // #1013
[all …]
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| /external/capstone/arch/X86/ |
| D | X86GenAsmWriter1_reduce.inc | 1255 3091U, // SAHF
2973 0U, // SAHF
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| D | X86GenAsmWriter_reduce.inc | 1255 5019U, // SAHF
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| D | X86GenAsmWriter1.inc | 2535 10420U, // SAHF
11392 0U, // SAHF
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| /external/llvm/docs/ |
| D | CodeGenerator.rst | 403 MI = BuildMI(MBB, DL, TII.get(X86::SAHF));
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| /external/llvm-project/llvm/docs/ |
| D | CodeGenerator.rst | 403 MI = BuildMI(MBB, DL, TII.get(X86::SAHF));
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| /external/llvm-project/clang/docs/ |
| D | UsersManual.rst | 3297 - ``-march=x86-64-v2``: (close to Nehalem) CMPXCHG16B, LAHF-SAHF, POPCNT, SSE3, SSE4.1, SSE4.2, SSS…
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