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Searched refs:SEB (Results 1 – 25 of 43) sorted by relevance

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/external/llvm/test/CodeGen/Mips/
Datomic.ll2 ; RUN: FileCheck %s -check-prefixes=ALL,MIPS32-ANY,NO-SEB-SEH,CHECK-EL,NOT-MICROMIPS
4 ; RUN: FileCheck %s -check-prefixes=ALL,MIPS32-ANY,HAS-SEB-SEH,CHECK-EL,NOT-MICROMIPS
6 ; RUN: FileCheck %s -check-prefixes=ALL,MIPS32-ANY,HAS-SEB-SEH,CHECK-EL,MIPSR6
8 ; RUN: FileCheck %s -check-prefixes=ALL,MIPS64-ANY,NO-SEB-SEH,CHECK-EL,NOT-MICROMIPS
10 ; RUN: FileCheck %s -check-prefixes=ALL,MIPS64-ANY,NO-SEB-SEH,CHECK-EL,NOT-MICROMIPS
12 ; RUN: FileCheck %s -check-prefixes=ALL,MIPS64-ANY,HAS-SEB-SEH,CHECK-EL,NOT-MICROMIPS
14 ; RUN: FileCheck %s -check-prefixes=ALL,MIPS64-ANY,HAS-SEB-SEH,CHECK-EL,MIPSR6
18 ; RUN: FileCheck %s -check-prefixes=ALL,MIPS32-ANY,HAS-SEB-SEH,CHECK-EL,MICROMIPS
23 ; RUN: FileCheck %s -check-prefixes=ALL,MIPS32-ANY,NO-SEB-SEH,CHECK-EB,NOT-MICROMIPS
162 ; NO-SEB-SEH: sll $[[R19:[0-9]+]], $[[R18]], 24
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dfp-sub-01.ll16 ; Check the low end of the SEB range.
26 ; Check the high end of the aligned SEB range.
62 ; Check that SEB allows indices.
75 ; Check that subtractions of spilled values can use SEB rather than SEBR.
/external/llvm-project/llvm/test/CodeGen/SystemZ/
Dfp-sub-01.ll18 ; Check the low end of the SEB range.
28 ; Check the high end of the aligned SEB range.
64 ; Check that SEB allows indices.
77 ; Check that subtractions of spilled values can use SEB rather than SEBR.
Dfp-strict-sub-01.ll22 ; Check the low end of the SEB range.
35 ; Check the high end of the aligned SEB range.
80 ; Check that SEB allows indices.
96 ; Check that subtractions of spilled values can use SEB rather than SEBR.
Dfoldmemop-vec-binops.mir400 # SEB can't be used if one operand is a VR32 (and not FP32).
/external/llvm-project/llvm/lib/Target/Mips/
DMipsExpandPseudo.cpp88 I->getOpcode() == Mips::ATOMIC_CMP_SWAP_I8_POSTRA ? Mips::SEB : Mips::SEH; in expandAtomicCmpSwapSubword()
349 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
355 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
361 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
367 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
373 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
379 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
385 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
DMipsScheduleP5600.td225 SEB, SEH, SLT, SLTu, SLL, SRA, SRL, XORi,
DMipsFastISel.cpp1855 emitInst(Mips::SEB, DestReg).addReg(SrcReg); in emitIntSExt32r2()
DMipsScheduleGeneric.td49 NOR, OR, ORi, ROTR, ROTRV, SEB, SEH, SLL,
DMipsInstrInfo.td2353 def SEB : MMRel, StdMMR6Rel, SignExtInReg<"seb", i8, GPR32Opnd, II_SEB>,
2893 def : MipsInstAlias<"seb $rd", (SEB GPR32Opnd:$rd, GPR32Opnd:$rd), 0>,
DMips16InstrInfo.td1010 // Format: SEB rx MIPS16e
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsExpandPseudo.cpp88 I->getOpcode() == Mips::ATOMIC_CMP_SWAP_I8_POSTRA ? Mips::SEB : Mips::SEH; in expandAtomicCmpSwapSubword()
349 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
355 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
361 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
367 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
373 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
379 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
385 SEOp = Mips::SEB; in expandAtomicBinOpSubword()
DMipsScheduleP5600.td224 SEB, SEH, SLT, SLTu, SLL, SRA, SRL, XORi,
DMipsFastISel.cpp1857 emitInst(Mips::SEB, DestReg).addReg(SrcReg); in emitIntSExt32r2()
DMipsScheduleGeneric.td49 NOR, OR, ORi, ROTR, ROTRV, SEB, SEH, SLL,
DMipsInstrInfo.td2352 def SEB : MMRel, StdMMR6Rel, SignExtInReg<"seb", i8, GPR32Opnd, II_SEB>,
2848 def : MipsInstAlias<"seb $rd", (SEB GPR32Opnd:$rd, GPR32Opnd:$rd), 0>,
DMips16InstrInfo.td1010 // Format: SEB rx MIPS16e
/external/pcre/dist2/src/sljit/
DsljitNativeMIPS_32.c90 return push_inst(compiler, SEB | T(src2) | D(dst), DR(dst)); in emit_single_op()
DsljitNativeMIPS_common.c269 #define SEB (HI(31) | (16 << 6) | LO(32)) macro
/external/llvm/lib/Target/SystemZ/
DSystemZInstrFP.td376 def SEB : BinaryRXE<"seb", 0xED0B, fsub, FP32, load, 4>;
/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZInstrFP.td452 defm SEB : BinaryRXEAndPseudo<"seb", 0xED0B, any_fsub, FP32, load, 4>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZInstrFP.td452 def SEB : BinaryRXE<"seb", 0xED0B, any_fsub, FP32, load, 4>;
/external/llvm/lib/Target/Mips/
DMipsFastISel.cpp1600 emitInst(Mips::SEB, DestReg).addReg(SrcReg); in emitIntSExt32r2()
DMips16InstrInfo.td1007 // Format: SEB rx MIPS16e
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenSubtargetInfo.inc757 {DBGFIELD("SEB") 1, false, false, 1, 2, 1, 1, 0, 0}, // #497
2441 {DBGFIELD("SEB") 16382, false, false, 0, 0, 0, 0, 0, 0}, // #497
3946 case 497: // SEB

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