Searched refs:SGPRSpill (Results 1 – 19 of 19) sorted by relevance
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 89 TargetStackID::SGPRSpill); in getVGPRSpillLaneOrTempRegister()
109 TargetStackID::SGPRSpill); in getVGPRSpillLaneOrTempRegister()
788 case TargetStackID::SGPRSpill: in isSupportedStackID()
877 TargetStackID::SGPRSpill; in emitPrologue()
886 TargetStackID::SGPRSpill; in emitPrologue()
984 assert(MFI.getStackID(FI) == TargetStackID::SGPRSpill); in emitPrologue()
1002 assert(MFI.getStackID(BasePtrFI) == TargetStackID::SGPRSpill); in emitPrologue()
1111 TargetStackID::SGPRSpill; in emitEpilogue()
1118 TargetStackID::SGPRSpill; in emitEpilogue()
1156 assert(MFI.getStackID(FI) == TargetStackID::SGPRSpill); in emitEpilogue()
[all …]
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| D | SIInstrFormats.td | 49 field bit SGPRSpill = 0;
168 let TSFlags{25} = SGPRSpill;
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| D | SILowerSGPRSpills.cpp | 355 assert(MFI.getStackID(FI) == TargetStackID::SGPRSpill); in runOnMachineFunction()
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| D | SIDefines.h | 56 SGPRSpill = 1 << 25, enumerator
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| D | SIInstrInfo.h | 573 return MI.getDesc().TSFlags & SIInstrFlags::SGPRSpill; in isSGPRSpill()
577 return get(Opcode).TSFlags & SIInstrFlags::SGPRSpill; in isSGPRSpill()
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| D | SIRegisterInfo.cpp | 1000 assert(FrameInfo.getStackID(Index) != TargetStackID::SGPRSpill); in buildSGPRSpillLoadStore()
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| D | SIInstrInfo.cpp | 1434 FrameInfo.setStackID(FrameIndex, TargetStackID::SGPRSpill); in storeRegToStackSlot()
1558 FrameInfo.setStackID(FrameIndex, TargetStackID::SGPRSpill); in loadRegFromStackSlot()
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| D | SIInstructions.td | 641 let UseNamedOperandTable = 1, SGPRSpill = 1, Uses = [EXEC] in {
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 668 case TargetStackID::SGPRSpill: in isSupportedStackID()
755 MFI.getStackID(FI) == TargetStackID::SGPRSpill); in emitPrologue()
858 MF.getFrameInfo().getStackID(FI) == TargetStackID::SGPRSpill); in emitEpilogue()
927 MFI.getStackID(I) == TargetStackID::SGPRSpill && in allSGPRSpillsAreDead()
1017 TargetStackID::SGPRSpill); in determineCalleeSaves()
1039 TargetStackID::SGPRSpill); in determineCalleeSaves()
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| D | SIInstrFormats.td | 48 field bit SGPRSpill = 0;
159 let TSFlags{24} = SGPRSpill;
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| D | SILowerSGPRSpills.cpp | 295 assert(MFI.getStackID(FI) == TargetStackID::SGPRSpill); in runOnMachineFunction()
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| D | SIDefines.h | 55 SGPRSpill = 1 << 24, enumerator
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| D | SIInstrInfo.h | 551 return MI.getDesc().TSFlags & SIInstrFlags::SGPRSpill; in isSGPRSpill()
555 return get(Opcode).TSFlags & SIInstrFlags::SGPRSpill; in isSGPRSpill()
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| D | SIInstructions.td | 512 let UseNamedOperandTable = 1, SGPRSpill = 1, Uses = [EXEC] in {
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| D | SIInstrInfo.cpp | 1095 FrameInfo.setStackID(FrameIndex, TargetStackID::SGPRSpill); in storeRegToStackSlot()
1212 FrameInfo.setStackID(FrameIndex, TargetStackID::SGPRSpill); in loadRegFromStackSlot()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetFrameLowering.h | 30 SGPRSpill = 1, enumerator
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| D | MIRYamlMapping.h | 316 IO.enumCase(ID, "sgpr-spill", TargetStackID::SGPRSpill);
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetFrameLowering.h | 29 SGPRSpill = 1, enumerator
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| D | MIRYamlMapping.h | 349 IO.enumCase(ID, "sgpr-spill", TargetStackID::SGPRSpill);
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