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Searched refs:SIMD_WIDTH (Results 1 – 16 of 16) sorted by relevance

/external/libvpx/libvpx/vp8/common/
Dloopfilter.h30 #define SIMD_WIDTH 1 macro
32 #define SIMD_WIDTH 16 macro
39 DECLARE_ALIGNED(SIMD_WIDTH, unsigned char,
40 mblim[MAX_LOOP_FILTER + 1][SIMD_WIDTH]);
41 DECLARE_ALIGNED(SIMD_WIDTH, unsigned char,
42 blim[MAX_LOOP_FILTER + 1][SIMD_WIDTH]);
43 DECLARE_ALIGNED(SIMD_WIDTH, unsigned char,
44 lim[MAX_LOOP_FILTER + 1][SIMD_WIDTH]);
45 DECLARE_ALIGNED(SIMD_WIDTH, unsigned char, hev_thr[4][SIMD_WIDTH]);
Dvp8_loopfilter.c70 memset(lfi->lim[i], block_inside_limit, SIMD_WIDTH); in vp8_loop_filter_update_sharpness()
71 memset(lfi->blim[i], (2 * filt_lvl + block_inside_limit), SIMD_WIDTH); in vp8_loop_filter_update_sharpness()
73 SIMD_WIDTH); in vp8_loop_filter_update_sharpness()
90 memset(lfi->hev_thr[i], i, SIMD_WIDTH); in vp8_loop_filter_init()
/external/libvpx/libvpx/vp9/common/
Dvp9_loopfilter.h27 #define SIMD_WIDTH 16 macro
41 DECLARE_ALIGNED(SIMD_WIDTH, uint8_t, mblim[SIMD_WIDTH]);
42 DECLARE_ALIGNED(SIMD_WIDTH, uint8_t, lim[SIMD_WIDTH]);
43 DECLARE_ALIGNED(SIMD_WIDTH, uint8_t, hev_thr[SIMD_WIDTH]);
Dvp9_loopfilter.c227 memset(lfi->lfthr[lvl].lim, block_inside_limit, SIMD_WIDTH); in update_sharpness()
229 SIMD_WIDTH); in update_sharpness()
249 memset(lfi->lfthr[lvl].hev_thr, (lvl >> 4), SIMD_WIDTH); in vp9_loop_filter_init()
/external/skqp/src/core/
DSkCoverageDelta.cpp47 return result + (SIMD_WIDTH - result % SIMD_WIDTH) % SIMD_WIDTH; in ExpandWidth()
114 SkFixed c[SIMD_WIDTH] = {0}; // prepare SIMD_WIDTH coverages at a time in convertCoverageToAlpha()
115 for(int ix = 0; ix < fExpandedWidth; ix += SIMD_WIDTH) { in convertCoverageToAlpha()
120 c[0] = c[SIMD_WIDTH - 1] + deltaRow[ix]; in convertCoverageToAlpha()
121 for(int j = 1; j < SIMD_WIDTH; ++j) { in convertCoverageToAlpha()
125 using SkNi = SkNx<SIMD_WIDTH, int>; in convertCoverageToAlpha()
DSkCoverageDelta.h114 static constexpr int SIMD_WIDTH = 8; variable
/external/libaom/libaom/av1/common/
Dav1_loopfilter.h28 #define SIMD_WIDTH 16 macro
111 DECLARE_ALIGNED(SIMD_WIDTH, uint8_t, mblim[SIMD_WIDTH]);
112 DECLARE_ALIGNED(SIMD_WIDTH, uint8_t, lim[SIMD_WIDTH]);
113 DECLARE_ALIGNED(SIMD_WIDTH, uint8_t, hev_thr[SIMD_WIDTH]);
Dav1_loopfilter.c56 memset(lfi->lfthr[lvl].lim, block_inside_limit, SIMD_WIDTH); in update_sharpness()
58 SIMD_WIDTH); in update_sharpness()
116 memset(lfi->lfthr[lvl].hev_thr, (lvl >> 4), SIMD_WIDTH); in av1_loop_filter_init()
/external/mesa3d/src/gallium/drivers/swr/rasterizer/core/
Dpa.h40 SIMD_WIDTH = KNOB_SIMD16_WIDTH, enumerator
56 SIMD_WIDTH = KNOB_SIMD_WIDTH,
269 const uint32_t numSimdVerts = streamSizeInVerts / SIMD_WIDTH; in GetNextVsOutput()
311 ? (SIMD_WIDTH - in NumPrims()
313 : SIMD_WIDTH; in NumPrims()
371 _simd16_set1_epi32(startID + this->primIDIncr * (this->numPrimsComplete / SIMD_WIDTH))); in GetPrimID()
375 _simd_set1_epi32(startID + this->primIDIncr * (this->numPrimsComplete / SIMD_WIDTH))); in GetPrimID()
432 indices[MAX_NUM_VERTS_PER_PRIM][SIMD_WIDTH]; // current index buffer for gather
435 indices[MAX_NUM_VERTS_PER_PRIM][SIMD_WIDTH]; // current index buffer for gather
552 uint32_t vertexIndex = this->headVertex / SIMD_WIDTH; in GetNextVsOutput()
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Dbinner.cpp39 template <typename SIMD_T, uint32_t SIMD_WIDTH>
50 template <typename SIMD_T, uint32_t SIMD_WIDTH>
349 template <typename SIMD_T, uint32_t SIMD_WIDTH, typename CT>
666 template <typename SIMD_T, uint32_t SIMD_WIDTH, typename CT>
757 uint32_t cullZeroAreaMask = maskLo | (maskHi << (SIMD_WIDTH / 2)); in BinTrianglesImpl()
786 frontWindingTris = maskLo | (maskHi << (SIMD_WIDTH / 2)); in BinTrianglesImpl()
1025 uint32_t cwTrisMask = maskCwLo | (maskCwHi << (SIMD_WIDTH / 2)); in BinTrianglesImpl()
1028 triMask = EarlyRasterizer<SIMD_T, SIMD_WIDTH, CT>( in BinTrianglesImpl()
1062 BinPostSetupLinesImpl<SIMD_T, SIMD_WIDTH>( in BinTrianglesImpl()
1070 BinPostSetupLinesImpl<SIMD_T, SIMD_WIDTH>( in BinTrianglesImpl()
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Dformat_conversion.h74 const uint32_t SIMD_WIDTH = sizeof(typename SIMD_T::Float) / sizeof(float); in LoadSOA() local
76 pSrc += (FormatTraits<SrcFormat>::GetBPC(comp) * SIMD_WIDTH) / 8; in LoadSOA()
243 const uint32_t SIMD_WIDTH = sizeof(typename SIMD_T::Float) / sizeof(float); in StoreSOA() local
245 pDst += (FormatTraits<DstFormat>::GetBPC(comp) * SIMD_WIDTH) / 8; in StoreSOA()
Dpa_avx.cpp531 PA_STATE_OPT::SIMD_WIDTH, in PaPatchListTerm()
582 PA_STATE_OPT::SIMD_WIDTH, in PaPatchListTerm_simd16()
815 SetNextPaState(pa, PaTriList0, PaTriListSingle0, 0, PA_STATE_OPT::SIMD_WIDTH, true); in PaTriList2()
901 …ate_simd16(pa, PaTriList0_simd16, PaTriList0, PaTriListSingle0, 0, PA_STATE_OPT::SIMD_WIDTH, true); in PaTriList2_simd16()
1134 SetNextPaState(pa, PaTriStrip1, PaTriStripSingle0, 0, PA_STATE_OPT::SIMD_WIDTH); in PaTriStrip1()
1179 …aState_simd16(pa, PaTriStrip1_simd16, PaTriStrip1, PaTriStripSingle0, 0, PA_STATE_OPT::SIMD_WIDTH); in PaTriStrip1_simd16()
1408 SetNextPaState(pa, PaTriFan1, PaTriFanSingle0, 0, PA_STATE_OPT::SIMD_WIDTH); in PaTriFan1()
1459 …tNextPaState_simd16(pa, PaTriFan1_simd16, PaTriFan1, PaTriFanSingle0, 0, PA_STATE_OPT::SIMD_WIDTH); in PaTriFan1_simd16()
1592 SetNextPaState(pa, PaQuadList0, PaQuadListSingle0, 0, PA_STATE_OPT::SIMD_WIDTH, true); in PaQuadList1()
1632 …_simd16(pa, PaQuadList0_simd16, PaQuadList0, PaQuadListSingle0, 0, PA_STATE_OPT::SIMD_WIDTH, true); in PaQuadList1_simd16()
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Dfrontend.cpp1176 template <typename SIMD_T, uint32_t SIMD_WIDTH>
1201 uint32_t numSimdBatches = AlignUp(gsState.maxNumVerts, SIMD_WIDTH) / SIMD_WIDTH; in AllocateGsBuffers()
/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/
Dsimdlib_types.hpp230 static const uint32_t SIMD_WIDTH = 4; variable
313 static const uint32_t SIMD_WIDTH = 8; variable
453 static const uint32_t SIMD_WIDTH = 16; variable
Dsimdlib_256_avx.inl521 for (uint32_t i = 0; i < SIMD_WIDTH; ++i)
539 for (uint32_t i = 0; i < SIMD_WIDTH; ++i)
584 for (uint32_t i = 0; i < SIMD_WIDTH; ++i)
Dsimdlib_128_avx.inl425 for (uint32_t i = 0; i < SIMD_WIDTH; ++i)