Searched refs:SUNXI_R_PRCM_BASE (Results 1 – 6 of 6) sorted by relevance
134 mmio_setbits_32(SUNXI_R_PRCM_BASE + 0x28, BIT(0)); in sunxi_init_platform_r_twi()147 mmio_setbits_32(SUNXI_R_PRCM_BASE + 0x28, device_bit); in sunxi_init_platform_r_twi()149 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, BIT(0)); in sunxi_init_platform_r_twi()152 mmio_clrbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()153 mmio_setbits_32(SUNXI_R_PRCM_BASE + reset_offset, device_bit); in sunxi_init_platform_r_twi()
25 #define SUNXI_CPU_POWER_CLAMP_REG(c, n) (SUNXI_R_PRCM_BASE + 0x0140 + \27 #define SUNXI_POWEROFF_GATING_REG(c) (SUNXI_R_PRCM_BASE + 0x0100 + (c) * 4)
12 #define SUNXI_R_PRCM_SEC_SWITCH_REG (SUNXI_R_PRCM_BASE + 0x01d0)
63 #define SUNXI_R_PRCM_BASE 0x01f01400 macro
12 #define SUNXI_R_PRCM_SEC_SWITCH_REG (SUNXI_R_PRCM_BASE + 0x0290)
54 #define SUNXI_R_PRCM_BASE 0x07010000 macro