| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86IntelInstPrinter.cpp | 163 const MCOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg); in printMemReference() local
166 if (SegReg.getReg()) { in printMemReference()
211 const MCOperand &SegReg = MI->getOperand(Op+1); in printSrcIdx() local
214 if (SegReg.getReg()) { in printSrcIdx()
234 const MCOperand &SegReg = MI->getOperand(Op+1); in printMemOffset() local
237 if (SegReg.getReg()) { in printMemOffset()
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| D | X86ATTInstPrinter.cpp | 200 const MCOperand &SegReg = MI->getOperand(Op + X86::AddrSegmentReg); in printMemReference() local
205 if (SegReg.getReg()) { in printMemReference()
241 const MCOperand &SegReg = MI->getOperand(Op + 1); in printSrcIdx() local
246 if (SegReg.getReg()) { in printSrcIdx()
272 const MCOperand &SegReg = MI->getOperand(Op + 1); in printMemOffset() local
277 if (SegReg.getReg()) { in printMemOffset()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 60 unsigned SegReg; member
144 if (Mem.SegReg) in print()
145 OS << ",SegReg=" << X86IntelInstPrinter::getRegisterName(Mem.SegReg); in print()
181 return Mem.SegReg; in getMemSegReg()
633 Res->Mem.SegReg = 0;
649 CreateMem(unsigned ModeSize, unsigned SegReg, const MCExpr *Disp,
655 assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!");
661 Res->Mem.SegReg = SegReg;
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| D | X86AsmParser.cpp | 890 std::unique_ptr<X86Operand> ParseMemOperand(unsigned SegReg,
899 CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp, unsigned BaseReg,
1380 FinalOp.Mem.SegReg = OrigOp.Mem.SegReg; in VerifyAndAdjustOperands()
1409 unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, in CreateMemForInlineAsm() argument
1447 return X86Operand::CreateMem(getPointerWidth(), SegReg, Disp, BaseReg, in CreateMemForInlineAsm()
2209 std::unique_ptr<X86Operand> X86AsmParser::ParseMemOperand(unsigned SegReg, in ParseMemOperand() argument
2286 if (SegReg == 0) in ParseMemOperand()
2288 return X86Operand::CreateMem(getPointerWidth(), SegReg, Disp, 0, 0, 1, in ParseMemOperand()
2373 if (BaseReg == X86::DX && IndexReg == 0 && Scale == 1 && SegReg == 0 && in ParseMemOperand()
2381 if (SegReg || BaseReg || IndexReg) in ParseMemOperand()
[all …]
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| /external/llvm-project/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 58 unsigned SegReg; member
143 if (Mem.SegReg) in print()
144 OS << ",SegReg=" << X86IntelInstPrinter::getRegisterName(Mem.SegReg); in print()
180 return Mem.SegReg; in getMemSegReg()
668 Res->Mem.SegReg = 0;
685 CreateMem(unsigned ModeSize, unsigned SegReg, const MCExpr *Disp,
693 assert((SegReg || BaseReg || IndexReg || DefaultBaseReg) &&
700 Res->Mem.SegReg = SegReg;
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| D | X86AsmParser.cpp | 1115 bool ParseMemOperand(unsigned SegReg, const MCExpr *Disp, SMLoc StartLoc,
1121 bool CreateMemForMSInlineAsm(unsigned SegReg, const MCExpr *Disp,
1697 FinalOp.Mem.SegReg = OrigOp.Mem.SegReg; in VerifyAndAdjustOperands()
1727 unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, in CreateMemForMSInlineAsm() argument
1770 getPointerWidth(), SegReg, Disp, BaseReg, IndexReg, Scale, Start, End, in CreateMemForMSInlineAsm()
2816 bool X86AsmParser::ParseMemOperand(unsigned SegReg, const MCExpr *Disp, in ParseMemOperand() argument
2892 if (SegReg == 0) in ParseMemOperand()
2896 Operands.push_back(X86Operand::CreateMem(getPointerWidth(), SegReg, Disp, in ParseMemOperand()
2980 if (BaseReg == X86::DX && IndexReg == 0 && Scale == 1 && SegReg == 0 && in ParseMemOperand()
2991 if (SegReg || BaseReg || IndexReg) in ParseMemOperand()
[all …]
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 53 unsigned SegReg; member
113 return Mem.SegReg; in getMemSegReg()
501 Res->Mem.SegReg = 0;
516 CreateMem(unsigned ModeSize, unsigned SegReg, const MCExpr *Disp,
522 assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!");
528 Res->Mem.SegReg = SegReg;
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| D | X86AsmParser.cpp | 700 ParseIntelSegmentOverride(unsigned SegReg, SMLoc Start, unsigned Size);
705 std::unique_ptr<X86Operand> ParseIntelBracExpression(unsigned SegReg,
713 std::unique_ptr<X86Operand> ParseMemOperand(unsigned SegReg, SMLoc StartLoc);
716 CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp, unsigned BaseReg,
1112 FinalOp.Mem.SegReg = OrigOp.Mem.SegReg; in VerifyAndAdjustOperands()
1160 unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, in CreateMemForInlineAsm() argument
1198 return X86Operand::CreateMem(getPointerWidth(), SegReg, Disp, BaseReg, in CreateMemForInlineAsm()
1388 X86AsmParser::ParseIntelBracExpression(unsigned SegReg, SMLoc Start, in ParseIntelBracExpression() argument
1445 if (!SegReg) in ParseIntelBracExpression()
1447 return X86Operand::CreateMem(getPointerWidth(), SegReg, Disp, 0, 0, 1, in ParseIntelBracExpression()
[all …]
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| /external/capstone/arch/X86/ |
| D | X86ATTInstPrinter.c | 402 MCOperand *SegReg; in printSrcIdx() local
420 SegReg = MCInst_getOperand(MI, Op+1); in printSrcIdx()
421 reg = MCOperand_getReg(SegReg); in printSrcIdx()
527 MCOperand *SegReg = MCInst_getOperand(MI, Op+1); in printMemOffset() local
546 reg = MCOperand_getReg(SegReg); in printMemOffset()
808 MCOperand *SegReg = MCInst_getOperand(MI, Op + X86_AddrSegmentReg); in printMemReference() local
829 segreg = MCOperand_getReg(SegReg); in printMemReference()
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| D | X86IntelInstPrinter.c | 520 MCOperand *SegReg; in printSrcIdx() local
542 SegReg = MCInst_getOperand(MI, Op+1); in printSrcIdx()
543 reg = MCOperand_getReg(SegReg); in printSrcIdx()
656 MCOperand *SegReg = MCInst_getOperand(MI, Op + 1); in printMemOffset() local
679 reg = MCOperand_getReg(SegReg); in printMemOffset()
1023 MCOperand *SegReg = MCInst_getOperand(MI, Op + X86_AddrSegmentReg); in printMemReference() local
1046 reg = MCOperand_getReg(SegReg); in printMemReference()
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| /external/llvm/lib/Target/X86/ |
| D | X86AsmPrinter.cpp | 300 const MachineOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg); in printIntelMemReference() local
303 if (SegReg.getReg()) { in printIntelMemReference()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86AsmPrinter.cpp | 354 const MachineOperand &SegReg = MI->getOperand(OpNo + X86::AddrSegmentReg); in PrintIntelMemReference() local
363 if (SegReg.getReg()) { in PrintIntelMemReference()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86AsmPrinter.cpp | 357 const MachineOperand &SegReg = MI->getOperand(OpNo + X86::AddrSegmentReg); in PrintIntelMemReference() local
366 if (SegReg.getReg()) { in PrintIntelMemReference()
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| /external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 542 const MCOperand &SegReg = Inst.getOperand(MemOpStart + X86::AddrSegmentReg); in evaluateMemoryOperandAddress() local
547 if (SegReg.getReg() != 0 || IndexReg.getReg() != 0 || ScaleAmt.getImm() != 1 || in evaluateMemoryOperandAddress()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 530 const MCOperand &SegReg = Inst.getOperand(MemOpStart + X86::AddrSegmentReg); in evaluateMemoryOperandAddress() local
535 if (SegReg.getReg() != 0 || IndexReg.getReg() != 0 || ScaleAmt.getImm() != 1 || in evaluateMemoryOperandAddress()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 3542 Register SegReg = SrcRegs[i]; in narrowScalarExtract() local
3545 SegReg = MRI.createGenericVirtualRegister(LLT::scalar(SegSize)); in narrowScalarExtract()
3546 MIRBuilder.buildExtract(SegReg, SrcRegs[i], ExtractOffset); in narrowScalarExtract()
3549 DstRegs.push_back(SegReg); in narrowScalarExtract()
3614 Register SegReg = OpReg; in narrowScalarInsert() local
3617 SegReg = MRI.createGenericVirtualRegister(LLT::scalar(SegSize)); in narrowScalarInsert()
3618 MIRBuilder.buildExtract(SegReg, OpReg, ExtractOffset); in narrowScalarInsert()
3622 MIRBuilder.buildInsert(DstReg, SrcRegs[i], SegReg, InsertOffset); in narrowScalarInsert()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 4528 Register SegReg = SrcRegs[i]; in narrowScalarExtract() local
4531 SegReg = MRI.createGenericVirtualRegister(LLT::scalar(SegSize)); in narrowScalarExtract()
4532 MIRBuilder.buildExtract(SegReg, SrcRegs[i], ExtractOffset); in narrowScalarExtract()
4535 DstRegs.push_back(SegReg); in narrowScalarExtract()
4602 Register SegReg = OpReg; in narrowScalarInsert() local
4605 SegReg = MRI.createGenericVirtualRegister(LLT::scalar(SegSize)); in narrowScalarInsert()
4606 MIRBuilder.buildExtract(SegReg, OpReg, ExtractOffset); in narrowScalarInsert()
4610 MIRBuilder.buildInsert(DstReg, SrcRegs[i], SegReg, InsertOffset); in narrowScalarInsert()
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