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Searched refs:Sn (Results 1 – 25 of 53) sorted by relevance

12 3

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
D	ARMInstrVFP.td	`375 let TwoOperandAliasConstraint = "$Sn = $Sd" in 377 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), 378 IIC_fpALU32, "vadd", ".f32\t$Sd, $Sn, $Sm", 379 [(set SPR:$Sd, (fadd SPR:$Sn, SPR:$Sm))]>, 386 let TwoOperandAliasConstraint = "$Sn = $Sd" in 388 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm), 389 IIC_fpALU16, "vadd", ".f16\t$Sd, $Sn, $Sm", 390 [(set HPR:$Sd, (fadd HPR:$Sn, HPR:$Sm))]>, 400 let TwoOperandAliasConstraint = "$Sn = $Sd" in 402 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), [all …]`
D	ARMInstrFormats.td	`1913 bits<5> Sn; 1919 let Inst{19-16} = Sn{4-1}; 1920 let Inst{7} = Sn{0}; 1940 bits<5> Sn; 1948 let Inst{19-16} = Sn{4-1}; 1949 let Inst{7} = Sn{0}; 1971 bits<5> Sn; 1977 let Inst{19-16} = Sn{4-1}; 1978 let Inst{7} = Sn{0}; 2048 bits<5> Sn; [all …]`
/external/llvm/lib/Target/ARM/
D	ARMInstrVFP.td	`341 let TwoOperandAliasConstraint = "$Sn = $Sd" in 343 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), 344 IIC_fpALU32, "vadd", ".f32\t$Sd, $Sn, $Sm", 345 [(set SPR:$Sd, (fadd SPR:$Sn, SPR:$Sm))]> { 351 let TwoOperandAliasConstraint = "$Sn = $Sd" in 353 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), 354 IIC_fpALU16, "vadd", ".f16\t$Sd, $Sn, $Sm", 363 let TwoOperandAliasConstraint = "$Sn = $Sd" in 365 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), 366 IIC_fpALU32, "vsub", ".f32\t$Sd, $Sn, $Sm", [all …]`
D	ARMInstrFormats.td	`1781 bits<5> Sn; 1787 let Inst{19-16} = Sn{4-1}; 1788 let Inst{7} = Sn{0}; 1808 bits<5> Sn; 1816 let Inst{19-16} = Sn{4-1}; 1817 let Inst{7} = Sn{0}; 1839 bits<5> Sn; 1845 let Inst{19-16} = Sn{4-1}; 1846 let Inst{7} = Sn{0}; 1912 bits<5> Sn; [all …]`
/external/llvm-project/llvm/lib/Target/ARM/
D	ARMInstrVFP.td	410 let TwoOperandAliasConstraint = "$Sn = $Sd" in 412 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), 413 IIC_fpALU32, "vadd", ".f32\t$Sd, $Sn, $Sm", 414 [(set SPR:$Sd, (fadd SPR:$Sn, SPR:$Sm))]>, 421 let TwoOperandAliasConstraint = "$Sn = $Sd" in 423 (outs HPR:$Sd), (ins HPR:$Sn, HPR:$Sm), 424 IIC_fpALU16, "vadd", ".f16\t$Sd, $Sn, $Sm", 425 [(set (f16 HPR:$Sd), (fadd (f16 HPR:$Sn), (f16 HPR:$Sm)))]>, 435 let TwoOperandAliasConstraint = "$Sn = $Sd" in 437 (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), [all …]
D	ARMInstrFormats.td	`1922 bits<5> Sn; 1928 let Inst{19-16} = Sn{4-1}; 1929 let Inst{7} = Sn{0}; 1949 bits<5> Sn; 1957 let Inst{19-16} = Sn{4-1}; 1958 let Inst{7} = Sn{0}; 1980 bits<5> Sn; 1986 let Inst{19-16} = Sn{4-1}; 1987 let Inst{7} = Sn{0}; 2057 bits<5> Sn; [all …]`
/external/swiftshader/third_party/subzero/src/
D	IceAssemblerARM32.cpp	1296 IValueT Sd, IValueT Sn, IValueT Sm) { in emitVFPsss() argument 1298 assert(Sn < RegARM32::getNumSRegs()); in emitVFPsss() 1304 (getYInRegXXXXY(Sd) << 22) \| (getXXXXInRegXXXXY(Sn) << 16) \| in emitVFPsss() 1305 (getXXXXInRegXXXXY(Sd) << 12) \| (getYInRegXXXXY(Sn) << 7) \| in emitVFPsss() 1314 const IValueT Sn = encodeSRegister(OpSn, "Sn", InstName); in emitVFPsss() local 1316 emitVFPsss(Cond, Opcode, Sd, Sn, Sm); in emitVFPsss() 2568 constexpr IValueT Sn = 0; in vcmps() local 2569 emitVFPsss(Cond, VcmpsOpcode, Sd, Sn, Sm); in vcmps() 2576 constexpr IValueT Sn = 0; in vcmpsz() local 2578 emitVFPsss(Cond, VcmpszOpcode, Sd, Sn, Sm); in vcmpsz() [all …]
D	IceAssemblerARM32.h	`900 void emitVFPsss(CondARM32::Cond Cond, IValueT Opcode, IValueT Sd, IValueT Sn,`
/external/icu/icu4c/source/data/locales/
D	jv.txt	`984 "-1"{"Sn wingi"} 985 "0"{"Sn iki"} 986 "1"{"Sn ngarep"} 990 other{"ing {0} Sn"} 993 other{"{0} Sn kepungkur"}`
/external/cldr/common/testData/transforms/
D	ar-t-cs.txt	`169 Sněžka سناجكا`
D	ja-t-cs.txt	`166 Sněžka スニェシュカ`
D	chr-t-cs.txt	`169 Sněžka ᏍᏅᏍᎧ`
D	fa-t-cs.txt	`169 Sněžka سناژکا`
D	am-t-cs.txt	`169 Sněžka ስኘዢካ`
D	cs-fonipa-t-cs.txt	`169 Sněžka sɲɛʒka`
/external/llvm-project/llvm/tools/llvm-ml/
D	Opts.td	`96 def listing_without_symbols : UnsupportedFlag<"Sn">, HelpText<"">;`
/external/ImageMagick/PerlMagick/t/reference/filter/
D	Raise.miff	`15 …�58�7;�65�85�:8�78�6;�84�8*�:)�:'�=!�<&�KM�Bg�6g�CO3648+/DN)��y��sTkEEb-Uq:Sn=Lg3Mf9Ke8Lf5Pl7cf]ac…`
D	Despeckle.miff	`15 …<2�=2�90�7/�4-�4,�4*�6)�7)�9,�B:�CA�BA�@5�A2�@3�BD�EI�DL�DY�Eb�Iq�Kt�Qt�Uv�Sn�mx�cb��…`
/external/swiftshader/third_party/subzero/docs/
D	REGALLOC.rst	223 one of those source variables ``Sn``, and ``Sn`` was assigned a register, then 224 ``Sn``'s register is usually a good choice for ``V``. This is especially true
/external/ImageMagick/PerlMagick/t/reference/write/filter/
D	RadialBlur.miff	43 …0�A5�>3�7.�7+�:�:{8)v6(z8,�H;�SE�VM�\U�nZXeA@P2NZBCJ29;(8;0?I3ZoAl�Kq�Rs�Sn�Pj�Nh�N_~Hg_Ph`Ph`Ph…
D	Despeckle.miff	`43 …<2�=2�90�7/�4-�4,�4*�6)�7)�9,�B:�CA�BA�@5�A2�@3�BD�EI�DL�DY�Eb�Iq�Kt�Qt�Uv�Sn�mx�cb��…`
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
D	ARMGenGlobalISel.inc	8034 … // (bitconvert:{ :[i32] } SPR:{ :[f32] }:$Sn) => (VMOVRS:{ :[i32] } SPR:{ :[f32] }:$Sn) 8037 GIR_Copy, /NewInsnID/0, /OldInsnID/0, /OpIdx/1, // Sn 8051 GIR_Copy, /NewInsnID/0, /OldInsnID/0, /OpIdx/0, // Sn 33152 …// (fadd:{ :[f16] } HPR:{ :[f16] }:$Sn, HPR:{ :[f16] }:$Sm) => (VADDH:{ :[f16] } HPR:{ :[f1… 33155 GIR_Copy, /NewInsnID/0, /OldInsnID/0, /OpIdx/1, // Sn 33173 …// (fadd:{ :[f32] } SPR:{ :[f32] }:$Sn, SPR:{ :[f32] }:$Sm) => (VADDS:{ :[f32] } SPR:{ :[f3… 33176 GIR_Copy, /NewInsnID/0, /OldInsnID/0, /OpIdx/1, // Sn 33455 …// (fsub:{ :[f16] } HPR:{ :[f16] }:$Sn, HPR:{ :[f16] }:$Sm) => (VSUBH:{ :[f16] } HPR:{ :[f1… 33458 GIR_Copy, /NewInsnID/0, /OldInsnID/0, /OpIdx/1, // Sn 33476 …// (fsub:{ :[f32] } SPR:{ :[f32] }:$Sn, SPR:{ :[f32] }:$Sm) => (VSUBS:{ :[f32] } SPR:{ :[f3… [all …]
D	ARMGenDAGISel.inc	34025 …// Src: (ARMcmov:{ :[f16] } HPR:{ :[f16] }:$Sm, HPR:{ :[f16] }:$Sn, 12:{ :[i32] }) - Complexit… 34026 // Dst: (VSELGTH:{ :[f16] } HPR:{ :[f16] }:$Sn, HPR:{ :[f16] }:$Sm) 34031 …// Src: (ARMcmov:{ :[f32] } SPR:{ :[f32] }:$Sm, SPR:{ :[f32] }:$Sn, 12:{ :[i32] }) - Complexit… 34032 // Dst: (VSELGTS:{ :[f32] } SPR:{ :[f32] }:$Sn, SPR:{ :[f32] }:$Sm) 34046 …// Src: (ARMcmov:{ :[f16] } HPR:{ :[f16] }:$Sm, HPR:{ :[f16] }:$Sn, 10:{ :[i32] }) - Complexit… 34047 // Dst: (VSELGEH:{ :[f16] } HPR:{ :[f16] }:$Sn, HPR:{ :[f16] }:$Sm) 34052 …// Src: (ARMcmov:{ :[f32] } SPR:{ :[f32] }:$Sm, SPR:{ :[f32] }:$Sn, 10:{ :[i32] }) - Complexit… 34053 // Dst: (VSELGES:{ :[f32] } SPR:{ :[f32] }:$Sn, SPR:{ :[f32] }:$Sm) 34067 …// Src: (ARMcmov:{ :[f16] } HPR:{ :[f16] }:$Sm, HPR:{ :[f16] }:$Sn, 0:{ :[i32] }) - Complexity… 34068 // Dst: (VSELEQH:{ :[f16] } HPR:{ :[f16] }:$Sn, HPR:{ *:[f16] }:$Sm) [all …]
/external/libjpeg-turbo/testimages/
D	testorig.ppm	4 …Sn�Wo�Wt�Xs�Un�Rk�Of�Kc�Ha�F_�F[�CY}@St;Pn8Ok:Rl=Xn@ZqCWo?Vq>WqARE5UH8XK;ZM=[N>\O?^QA`SC`SCaTDaTDa…
/external/ImageMagick/PerlMagick/t/reference/read/
D	input_uyvy.miff	`14 …dv�du�au�d�\|��\|��{��{�y�y�s��s�lvEv�\|��\|��u��u�ig�\g�je�je�ng�ag�Sn�Pn�Nn�Ln�Ko�Lo�Kq�Iq…`

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