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Searched refs:Src1Ty (Results 1 – 12 of 12) sorted by relevance

/external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
DMIPatternMatch.h422 template <typename Src0Ty, typename Src1Ty, typename Src2Ty, unsigned Opcode>
425 Src1Ty Src1;
428 TernaryOp_match(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2)
443 template <typename Src0Ty, typename Src1Ty, typename Src2Ty>
444 inline TernaryOp_match<Src0Ty, Src1Ty, Src2Ty,
446 m_GInsertVecElt(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2) {
447 return TernaryOp_match<Src0Ty, Src1Ty, Src2Ty,
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/
DMachineIRBuilder.cpp655 LLT Src1Ty = Src1.getLLTTy(*getMRI()); in buildShuffleVector() local
657 assert(Src1Ty.getNumElements() + Src2Ty.getNumElements() >= Mask.size()); in buildShuffleVector()
658 assert(DstTy.getElementType() == Src1Ty.getElementType() && in buildShuffleVector()
660 (void)Src1Ty; in buildShuffleVector()
DLegalizerHelper.cpp5409 const LLT Src1Ty = MRI.getType(Src1); in lowerFCopySign() local
5412 const int Src1Size = Src1Ty.getScalarSizeInBits(); in lowerFCopySign()
5423 if (Src0Ty == Src1Ty) { in lowerFCopySign()
5424 auto And1 = MIRBuilder.buildAnd(Src1Ty, Src1, SignBitMask); in lowerFCopySign()
5433 auto ShiftAmt = MIRBuilder.buildConstant(Src1Ty, Src1Size - Src0Size); in lowerFCopySign()
5434 auto Shift = MIRBuilder.buildLShr(Src1Ty, Src1, ShiftAmt); in lowerFCopySign()
/external/llvm-project/llvm/lib/CodeGen/
DMachineVerifier.cpp1388 LLT Src1Ty = MRI->getType(MI->getOperand(2).getReg()); in verifyPreISelGenericInstruction() local
1390 if (Src0Ty != Src1Ty) in verifyPreISelGenericInstruction()
1495 LLT Src1Ty = MRI->getType(MI->getOperand(1).getReg()); in verifyPreISelGenericInstruction() local
1499 if (!Src1Ty.isScalar()) in verifyPreISelGenericInstruction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DLegalizerHelper.cpp4051 const LLT Src1Ty = MRI.getType(Src1); in lowerFCopySign() local
4054 const int Src1Size = Src1Ty.getScalarSizeInBits(); in lowerFCopySign()
4065 if (Src0Ty == Src1Ty) { in lowerFCopySign()
4066 auto And1 = MIRBuilder.buildAnd(Src1Ty, Src0, SignBitMask); in lowerFCopySign()
4075 auto ShiftAmt = MIRBuilder.buildConstant(Src1Ty, Src1Size - Src0Size); in lowerFCopySign()
4076 auto Shift = MIRBuilder.buildLShr(Src1Ty, Src1, ShiftAmt); in lowerFCopySign()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DMachineVerifier.cpp1412 LLT Src1Ty = MRI->getType(MI->getOperand(2).getReg()); in verifyPreISelGenericInstruction() local
1414 if (Src0Ty != Src1Ty) in verifyPreISelGenericInstruction()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstructionSelector.cpp591 LLT Src1Ty = MRI->getType(Src1Reg); in selectG_INSERT() local
594 unsigned InsSize = Src1Ty.getSizeInBits(); in selectG_INSERT()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstructionSelector.cpp3778 const LLT Src1Ty = MRI.getType(Src1Reg); in selectShuffleVector() local
3790 if (!Src1Ty.isVector() || !Src2Ty.isVector()) { in selectShuffleVector()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUInstructionSelector.cpp700 LLT Src1Ty = MRI->getType(Src1Reg); in selectG_INSERT() local
703 unsigned InsSize = Src1Ty.getSizeInBits(); in selectG_INSERT()
/external/llvm-project/llvm/lib/Target/AArch64/GISel/
DAArch64InstructionSelector.cpp4523 const LLT Src1Ty = MRI.getType(Src1Reg); in selectShuffleVector() local
4535 if (!Src1Ty.isVector() || !Src2Ty.isVector()) { in selectShuffleVector()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Vectorize/
DSLPVectorizer.cpp3576 VectorType *Src1Ty = VectorType::get(Src1SclTy, VL.size()); in getEntryCost() local
3578 VecCost += TTI->getCastInstrCost(E->getAltOpcode(), VecTy, Src1Ty); in getEntryCost()
/external/llvm-project/llvm/lib/Transforms/Vectorize/
DSLPVectorizer.cpp3819 auto *Src1Ty = FixedVectorType::get(Src1SclTy, VL.size()); in getEntryCost() local
3822 VecCost += TTI->getCastInstrCost(E->getAltOpcode(), VecTy, Src1Ty, in getEntryCost()