/external/llvm/lib/CodeGen/ |
D | OptimizePHIs.cpp | 107 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle() local 110 if (SrcMI && SrcMI->isCopy() && in IsSingleValuePHICycle() 111 !SrcMI->getOperand(0).getSubReg() && in IsSingleValuePHICycle() 112 !SrcMI->getOperand(1).getSubReg() && in IsSingleValuePHICycle() 113 TargetRegisterInfo::isVirtualRegister(SrcMI->getOperand(1).getReg())) in IsSingleValuePHICycle() 114 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg()); in IsSingleValuePHICycle() 115 if (!SrcMI) in IsSingleValuePHICycle() 118 if (SrcMI->isPHI()) { in IsSingleValuePHICycle() 119 if (!IsSingleValuePHICycle(SrcMI, SingleValReg, PHIsInCycle)) in IsSingleValuePHICycle()
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/external/llvm-project/llvm/lib/CodeGen/ |
D | OptimizePHIs.cpp | 116 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle() local 119 if (SrcMI && SrcMI->isCopy() && !SrcMI->getOperand(0).getSubReg() && in IsSingleValuePHICycle() 120 !SrcMI->getOperand(1).getSubReg() && in IsSingleValuePHICycle() 121 Register::isVirtualRegister(SrcMI->getOperand(1).getReg())) { in IsSingleValuePHICycle() 122 SrcReg = SrcMI->getOperand(1).getReg(); in IsSingleValuePHICycle() 123 SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle() 125 if (!SrcMI) in IsSingleValuePHICycle() 128 if (SrcMI->isPHI()) { in IsSingleValuePHICycle() 129 if (!IsSingleValuePHICycle(SrcMI, SingleValReg, PHIsInCycle)) in IsSingleValuePHICycle()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | OptimizePHIs.cpp | 116 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle() local 119 if (SrcMI && SrcMI->isCopy() && !SrcMI->getOperand(0).getSubReg() && in IsSingleValuePHICycle() 120 !SrcMI->getOperand(1).getSubReg() && in IsSingleValuePHICycle() 121 Register::isVirtualRegister(SrcMI->getOperand(1).getReg())) { in IsSingleValuePHICycle() 122 SrcReg = SrcMI->getOperand(1).getReg(); in IsSingleValuePHICycle() 123 SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle() 125 if (!SrcMI) in IsSingleValuePHICycle() 128 if (SrcMI->isPHI()) { in IsSingleValuePHICycle() 129 if (!IsSingleValuePHICycle(SrcMI, SingleValReg, PHIsInCycle)) in IsSingleValuePHICycle()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCMIPeephole.cpp | 587 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg); in simplifyCode() local 590 if (SrcMI->getOpcode() == PPC::LHZ || in simplifyCode() 591 SrcMI->getOpcode() == PPC::LHZX) { in simplifyCode() 592 if (!MRI->hasOneNonDBGUse(SrcMI->getOperand(0).getReg())) in simplifyCode() 609 isXForm(SrcMI->getOpcode())); in simplifyCode() 611 LLVM_DEBUG(SrcMI->dump()); in simplifyCode() 615 SrcMI->setDesc(TII->get(Opc)); in simplifyCode() 616 SrcMI->getOperand(0).setReg(MI.getOperand(0).getReg()); in simplifyCode() 631 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg); in simplifyCode() local 634 if (SrcMI->getOpcode() == PPC::LWZ || in simplifyCode() [all …]
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D | PPCInstrInfo.cpp | 4051 const MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in isSignOrZeroExtended() local 4052 if (SrcMI != NULL) in isSignOrZeroExtended() 4053 return isSignOrZeroExtended(*SrcMI, SignExt, Depth); in isSignOrZeroExtended() 4075 const MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in isSignOrZeroExtended() local 4076 if (SrcMI != NULL) in isSignOrZeroExtended() 4077 return isSignOrZeroExtended(*SrcMI, SignExt, Depth); in isSignOrZeroExtended() 4104 const MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in isSignOrZeroExtended() local 4105 if (SrcMI == NULL || !isSignOrZeroExtended(*SrcMI, SignExt, Depth+1)) in isSignOrZeroExtended()
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCMIPeephole.cpp | 750 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg); in simplifyCode() local 753 if (SrcMI->getOpcode() == PPC::LHZ || in simplifyCode() 754 SrcMI->getOpcode() == PPC::LHZX) { in simplifyCode() 755 if (!MRI->hasOneNonDBGUse(SrcMI->getOperand(0).getReg())) in simplifyCode() 772 isXForm(SrcMI->getOpcode())); in simplifyCode() 774 LLVM_DEBUG(SrcMI->dump()); in simplifyCode() 778 SrcMI->setDesc(TII->get(Opc)); in simplifyCode() 779 SrcMI->getOperand(0).setReg(MI.getOperand(0).getReg()); in simplifyCode() 794 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg); in simplifyCode() local 797 if (SrcMI->getOpcode() == PPC::LWZ || in simplifyCode() [all …]
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D | PPCInstrInfo.cpp | 3265 MachineInstr *SrcMI = nullptr; in simplifyRotateAndMaskInstr() local 3271 SrcMI = MRI->getVRegDef(FoldingReg); in simplifyRotateAndMaskInstr() 3273 SrcMI = getDefMIPostRA(FoldingReg, MI, OtherIntermediateUse); in simplifyRotateAndMaskInstr() 3275 if (!SrcMI) in simplifyRotateAndMaskInstr() 3280 switch (SrcMI->getOpcode()) { in simplifyRotateAndMaskInstr() 3295 CanErase = !SrcMI->hasImplicitDef() && MRI->hasOneNonDBGUse(FoldingReg); in simplifyRotateAndMaskInstr() 3298 !SrcMI->hasImplicitDef(); in simplifyRotateAndMaskInstr() 3301 if (!CanErase && SrcMI->definesRegister(SrcMI->getOperand(1).getReg())) in simplifyRotateAndMaskInstr() 3305 MI.getOperand(4).isImm() && SrcMI->getOperand(2).isImm() && in simplifyRotateAndMaskInstr() 3306 SrcMI->getOperand(3).isImm() && SrcMI->getOperand(4).isImm()) && in simplifyRotateAndMaskInstr() [all …]
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/external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
D | LegalizationArtifactCombiner.h | 82 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineAnyExt() local 83 if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) { in tryCombineAnyExt() 86 auto &CstVal = SrcMI->getOperand(1); in tryCombineAnyExt() 90 markInstAndDefDead(MI, *SrcMI, DeadInsts); in tryCombineAnyExt() 143 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineZExt() local 144 if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) { in tryCombineZExt() 147 auto &CstVal = SrcMI->getOperand(1); in tryCombineZExt() 151 markInstAndDefDead(MI, *SrcMI, DeadInsts); in tryCombineZExt() 212 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineTrunc() local 213 if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) { in tryCombineTrunc() [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | LegalizationArtifactCombiner.h | 82 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineAnyExt() local 83 if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) { in tryCombineAnyExt() 86 auto &CstVal = SrcMI->getOperand(1); in tryCombineAnyExt() 90 markInstAndDefDead(MI, *SrcMI, DeadInsts); in tryCombineAnyExt() 126 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineZExt() local 127 if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) { in tryCombineZExt() 130 auto &CstVal = SrcMI->getOperand(1); in tryCombineZExt() 134 markInstAndDefDead(MI, *SrcMI, DeadInsts); in tryCombineZExt() 179 auto *SrcMI = MRI.getVRegDef(SrcReg); in tryCombineTrunc() local 180 if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) { in tryCombineTrunc() [all …]
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/external/llvm-project/llvm/test/CodeGen/PowerPC/ |
D | jump-tables-collapse-rotate-remove-SrcMI.mir | 9 ; ModuleID = 'jump-tables-collapse-rotate-remove-SrcMI.ll' 10 source_filename = "jump-tables-collapse-rotate-remove-SrcMI.ll"
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/external/llvm/lib/Target/AMDGPU/ |
D | R600ControlFlowFinalizer.cpp | 283 unsigned DstMI, SrcMI; in isCompatibleWithClause() local 302 SrcMI = Reg; in isCompatibleWithClause() 304 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause() 309 if ((DstRegs.find(SrcMI) == DstRegs.end())) { in isCompatibleWithClause()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | R600ControlFlowFinalizer.cpp | 297 unsigned DstMI, SrcMI; in isCompatibleWithClause() local 316 SrcMI = Reg; in isCompatibleWithClause() 318 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause() 323 if ((DstRegs.find(SrcMI) == DstRegs.end())) { in isCompatibleWithClause()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | R600ControlFlowFinalizer.cpp | 298 unsigned DstMI, SrcMI; in isCompatibleWithClause() local 317 SrcMI = Reg; in isCompatibleWithClause() 319 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause() 324 if ((DstRegs.find(SrcMI) == DstRegs.end())) { in isCompatibleWithClause()
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/external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
D | CombinerHelper.cpp | 2249 MachineInstr *SrcMI = MRI.getVRegDef(SrcReg); in matchCombineExtOfExt() local 2252 unsigned SrcOpc = SrcMI->getOpcode(); in matchCombineExtOfExt() 2257 MatchInfo = std::make_tuple(SrcMI->getOperand(1).getReg(), SrcOpc); in matchCombineExtOfExt() 2335 MachineInstr *SrcMI = MRI.getVRegDef(SrcReg); in matchCombineTruncOfExt() local 2336 unsigned SrcOpc = SrcMI->getOpcode(); in matchCombineTruncOfExt() 2339 MatchInfo = std::make_pair(SrcMI->getOperand(1).getReg(), SrcOpc); in matchCombineTruncOfExt() 2397 MachineInstr *SrcMI = MRI.getVRegDef(SrcReg); in applyCombineTruncOfShl() local 2403 Builder.buildShl(DstReg, TruncShiftSrc, ShiftAmt, SrcMI->getFlags()); in applyCombineTruncOfShl()
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