Searched refs:SrcMask (Results 1 – 10 of 10) sorted by relevance
| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 1216 unsigned SrcMask = 1u << SrcBit; in computeSubRegLaneMasks() local
1219 assert(Idx2.LaneMask == SrcMask); in computeSubRegLaneMasks()
1235 I.Mask |= SrcMask; in computeSubRegLaneMasks()
1236 SrcMask = 0; in computeSubRegLaneMasks()
1239 if (SrcMask != 0) { in computeSubRegLaneMasks()
1240 MaskRolPair MaskRol = { SrcMask, RotateLeft }; in computeSubRegLaneMasks()
|
| /external/llvm-project/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 1494 LaneBitmask SrcMask = LaneBitmask::getLane(SrcBit); in computeSubRegLaneMasks() local
1497 assert(Idx2.LaneMask == SrcMask); in computeSubRegLaneMasks()
1514 I.Mask |= SrcMask; in computeSubRegLaneMasks()
1515 SrcMask = LaneBitmask::getNone(); in computeSubRegLaneMasks()
1518 if (SrcMask.any()) { in computeSubRegLaneMasks()
1519 MaskRolPair MaskRol = { SrcMask, RotateLeft }; in computeSubRegLaneMasks()
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringMIPS32.cpp | 4595 auto *SrcMask = makeReg(IceType_i32); in lowerIntrinsic() local
4607 _sllv(SrcMask, T5, T4); // Source mask in lowerIntrinsic()
4611 _and(Tdest, T6, SrcMask); in lowerIntrinsic()
4624 Context.insert<InstFakeUse>(SrcMask); in lowerIntrinsic()
4670 auto *SrcMask = makeReg(IceType_i32); in lowerIntrinsic() local
4682 _nor(SrcMask, getZero(), T5); in lowerIntrinsic()
4686 _and(RegAt, RegAt, SrcMask); in lowerIntrinsic()
4690 Context.insert<InstFakeUse>(SrcMask); in lowerIntrinsic()
|
| /external/llvm/lib/CodeGen/ |
| D | RegisterCoalescer.cpp | 1154 LaneBitmask SrcMask = TRI->getSubRegIndexLaneMask(SrcSubIdx); in eliminateUndefCopy() local
1156 if ((SR.LaneMask & SrcMask) == 0) in eliminateUndefCopy()
|
| /external/llvm/lib/Transforms/Vectorize/ |
| D | LoopVectorize.cpp | 3910 VectorParts SrcMask = createBlockInMask(Src); in createEdgeMask() local
3924 EdgeMask[part] = Builder.CreateAnd(EdgeMask[part], SrcMask[part]); in createEdgeMask()
3930 MaskCache[Edge] = SrcMask; in createEdgeMask()
3931 return SrcMask; in createEdgeMask()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | RegisterCoalescer.cpp | 1563 LaneBitmask SrcMask = TRI->getSubRegIndexLaneMask(SrcSubIdx); in eliminateUndefCopy() local
1565 if ((SR.LaneMask & SrcMask).none()) in eliminateUndefCopy()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | RegisterCoalescer.cpp | 1589 LaneBitmask SrcMask = TRI->getSubRegIndexLaneMask(SrcSubIdx); in eliminateUndefCopy() local
1591 if ((SR.LaneMask & SrcMask).none()) in eliminateUndefCopy()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Vectorize/ |
| D | LoopVectorize.cpp | 6713 VPValue *SrcMask = createBlockInMask(Src, Plan); in createEdgeMask() local
6720 return EdgeMaskCache[Edge] = SrcMask; in createEdgeMask()
6728 if (SrcMask) // Otherwise block in-mask is all-one, no need to AND. in createEdgeMask()
6729 EdgeMask = Builder.createAnd(EdgeMask, SrcMask); in createEdgeMask()
|
| /external/llvm-project/llvm/lib/Transforms/Vectorize/ |
| D | LoopVectorize.cpp | 7877 VPValue *SrcMask = createBlockInMask(Src, Plan); in createEdgeMask() local
7884 return EdgeMaskCache[Edge] = SrcMask; in createEdgeMask()
7892 if (SrcMask) // Otherwise block in-mask is all-one, no need to AND. in createEdgeMask()
7893 EdgeMask = Builder.createAnd(EdgeMask, SrcMask); in createEdgeMask()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 21719 SmallVectorImpl<APInt> *SrcMask = nullptr) { in matchScalarReduction() argument
21772 if (SrcMask) { in matchScalarReduction()
21775 SrcMask->push_back(SrcOpMap[SrcOp]); in matchScalarReduction()
|