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Searched refs:T59 (Results 1 – 5 of 5) sorted by relevance

/external/libcups/cups/
Dmd5.c105 # define T59 0xa3014314 macro
254 SET(c, d, a, b, 6, 15, T59); in _cups_md5_process()
/external/python/cpython2/Modules/
Dmd5.c124 #define T59 /* 0xa3014314 */ (T_MASK ^ 0x5cfebceb) macro
296 SET(c, d, a, b, 6, 15, T59); in md5_process()
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/
Dbad-reduction.ll392 ; CHECK-NEXT: [[T59:%.*]] = load i8, i8* [[T58]], align 1
408 ; CHECK-NEXT: [[T60:%.*]] = zext i8 [[T59]] to i32
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dload-global-i16.ll3919 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T57.XYZW, T59.X, 0
4045 ; EG-NEXT: LSHR T59.X, PV.W, literal.x,
4102 ; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T59, T61.X
4214 ; CM-NEXT: LSHR * T59.W, T50.W, literal.y,
4217 ; CM-NEXT: AND_INT T59.Z, T50.W, literal.x,
4221 ; CM-NEXT: LSHR T59.Y, T50.Z, literal.y,
4224 ; CM-NEXT: AND_INT T59.X, T50.Z, literal.x,
4723 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T59.XYZW, T37.X, 0
4807 ; EG-NEXT: BFE_INT T59.Z, T42.W, 0.0, literal.x,
4811 ; EG-NEXT: BFE_INT T59.X, T42.Z, 0.0, literal.x,
[all …]
Dload-constant-i16.ll3457 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T59.XYZW, T61.X, 0
3576 ; EG-NEXT: LSHR T59.W, T51.W, literal.y,
3580 ; EG-NEXT: AND_INT T59.Z, T51.W, literal.x,
3584 ; EG-NEXT: LSHR T59.Y, T51.Z, literal.y,
3586 ; EG-NEXT: AND_INT * T59.X, T51.Z, literal.z,
4197 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T59.XYZW, T37.X, 0
4280 ; EG-NEXT: BFE_INT T59.Z, T42.Y, 0.0, literal.x,
4284 ; EG-NEXT: BFE_INT T59.X, T42.X, 0.0, literal.x,
4293 ; EG-NEXT: BFE_INT T59.W, T5.W, 0.0, literal.x,
4297 ; EG-NEXT: BFE_INT T59.Y, PS, 0.0, literal.x,