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Searched refs:T64 (Results 1 – 7 of 7) sorted by relevance

/external/swiftshader/third_party/subzero/src/
DIceTargetLoweringX8664.cpp482 Variable *T64 = makeReg(IceType_i64, RegNum); in _sandbox_mem_reference() local
483 auto *Movzx = _movzx(T64, T); in _sandbox_mem_reference()
491 T = T64; in _sandbox_mem_reference()
625 Variable *T64 = makeReg(IceType_i64); in lowerIndirectJump() local
634 _movzx(T64, T); in lowerIndirectJump()
635 _add(T64, r15); in lowerIndirectJump()
636 JumpTarget = T64; in lowerIndirectJump()
689 Variable *T64 = makeReg(IceType_i64); in emitCallToTarget() local
699 _movzx(T64, T); in emitCallToTarget()
700 _add(T64, r15); in emitCallToTarget()
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/external/libcups/cups/
Dmd5.c110 # define T64 0xeb86d391 macro
259 SET(b, c, d, a, 9, 21, T64); in _cups_md5_process()
/external/python/cpython2/Modules/
Dmd5.c129 #define T64 /* 0xeb86d391 */ (T_MASK ^ 0x14792c6e) macro
301 SET(b, c, d, a, 9, 21, T64); in md5_process()
/external/llvm-project/clang/test/SemaCXX/
Dtype-traits.cpp2837 #define T64(X) T16(X),T16(X),T16(X),T16(X) macro
2838 #define T256(X) T64(X),T64(X),T64(X),T64(X)
2846 #undef T64
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/
Dbad-reduction.ll409 ; CHECK-NEXT: [[T64:%.*]] = zext i8 [[T63]] to i32
419 ; CHECK-NEXT: [[T65:%.*]] = shl nuw nsw i32 [[T64]], 16
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dload-global-i16.ll3916 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T50.XYZW, T64.X, 0
4072 ; EG-NEXT: LSHR T64.X, PV.W, literal.x,
4100 ; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T62, T64.X
4244 ; CM-NEXT: LSHR T64.X, PV.W, literal.x,
4713 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T64.XYZW, T55.X, 0
4869 ; EG-NEXT: BFE_INT T64.Z, T48.W, 0.0, literal.x,
4873 ; EG-NEXT: BFE_INT T64.X, T48.Z, 0.0, literal.x,
4882 ; EG-NEXT: BFE_INT T64.W, T1.Y, 0.0, literal.x,
4886 ; EG-NEXT: BFE_INT T64.Y, PS, 0.0, literal.x,
4918 ; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T64, T56.X
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Dload-constant-i16.ll3455 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T62.XYZW, T64.X, 0
3610 ; EG-NEXT: LSHR T64.X, PV.W, literal.x,
4188 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T64.XYZW, T54.X, 0
4336 ; EG-NEXT: BFE_INT T64.Z, T47.W, 0.0, literal.x,
4340 ; EG-NEXT: BFE_INT T64.X, T47.Z, 0.0, literal.x,
4349 ; EG-NEXT: BFE_INT T64.W, T1.Z, 0.0, literal.x,
4353 ; EG-NEXT: BFE_INT T64.Y, PS, 0.0, literal.x,