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Searched refs:TSS2_RC_LAYER_MASK (Results 1 – 25 of 164) sorted by relevance

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/external/tpm2-tss/src/tss2-esys/api/
DEsys_Startup.c71 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_Startup()
74 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_Startup()
183 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_Startup_Finish()
DEsys_FlushContext.c82 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_FlushContext()
85 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_FlushContext()
205 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_FlushContext_Finish()
DEsys_StirRandom.c85 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_StirRandom()
88 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_StirRandom()
234 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_StirRandom_Finish()
DEsys_TestParms.c88 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_TestParms()
91 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_TestParms()
240 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_TestParms_Finish()
DEsys_Shutdown.c88 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_Shutdown()
91 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_Shutdown()
240 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_Shutdown_Finish()
DEsys_SelfTest.c88 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_SelfTest()
91 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_SelfTest()
240 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_SelfTest_Finish()
DEsys_PolicyPhysicalPresence.c91 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_PolicyPhysicalPresence()
94 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_PolicyPhysicalPresence()
254 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_PolicyPhysicalPresence_Finish()
DEsys_PolicyRestart.c91 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_PolicyRestart()
94 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_PolicyRestart()
253 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_PolicyRestart_Finish()
DEsys_ReadClock.c88 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_ReadClock()
91 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_ReadClock()
249 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_ReadClock_Finish()
DEsys_ChangeEPS.c91 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_ChangeEPS()
94 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_ChangeEPS()
258 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_ChangeEPS_Finish()
DEsys_ContextLoad.c86 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_ContextLoad()
89 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_ContextLoad()
250 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_ContextLoad_Finish()
DEsys_EC_Ephemeral.c91 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_EC_Ephemeral()
94 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_EC_Ephemeral()
254 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_EC_Ephemeral_Finish()
DEsys_PolicyAuthorize.c101 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_PolicyAuthorize()
104 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_PolicyAuthorize()
277 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_PolicyAuthorize_Finish()
DEsys_PolicyPCR.c93 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_PolicyPCR()
96 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_PolicyPCR()
259 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_PolicyPCR_Finish()
DEsys_Clear.c90 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_Clear()
93 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_Clear()
262 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_Clear_Finish()
DEsys_ContextSave.c85 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_ContextSave()
88 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_ContextSave()
218 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_ContextSave_Finish()
DEsys_DictionaryAttackLockReset.c91 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_DictionaryAttackLockReset()
94 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_DictionaryAttackLockReset()
259 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_DictionaryAttackLockReset_Finish()
DEsys_FirmwareRead.c89 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_FirmwareRead()
92 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_FirmwareRead()
250 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_FirmwareRead_Finish()
DEsys_ClockRateAdjust.c93 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_ClockRateAdjust()
96 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_ClockRateAdjust()
262 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_ClockRateAdjust_Finish()
DEsys_ECC_Parameters.c91 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_ECC_Parameters()
94 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_ECC_Parameters()
254 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_ECC_Parameters_Finish()
DEsys_IncrementalSelfTest.c91 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_IncrementalSelfTest()
94 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_IncrementalSelfTest()
254 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_IncrementalSelfTest_Finish()
DEsys_PCR_Extend.c93 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_PCR_Extend()
96 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_PCR_Extend()
262 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_PCR_Extend_Finish()
DEsys_PolicyCpHash.c93 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_PolicyCpHash()
96 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_PolicyCpHash()
258 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_PolicyCpHash_Finish()
DEsys_PolicyGetDigest.c92 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) in Esys_PolicyGetDigest()
95 } while ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN); in Esys_PolicyGetDigest()
264 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { in Esys_PolicyGetDigest_Finish()
/external/tpm2-tss/src/tss2-fapi/
Difapi_macros.h51 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) \
59 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) \
100 if ((r & ~TSS2_RC_LAYER_MASK) == TSS2_BASE_RC_TRY_AGAIN) { \

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