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Searched refs:TTBR0_EL1 (Results 1 – 17 of 17) sorted by relevance

/external/linux-kselftest/tools/testing/selftests/kvm/include/aarch64/
Dprocessor.h19 #define TTBR0_EL1 3, 0, 2, 0, 0 macro
/external/llvm/test/MC/AArch64/
Darm64-system-encoding.s125 msr TTBR0_EL1, x3
205 ; CHECK: msr TTBR0_EL1, x3 ; encoding: [0x03,0x20,0x18,0xd5]
310 mrs x3, TTBR0_EL1
495 ; CHECK: mrs x3, TTBR0_EL1 ; encoding: [0x03,0x20,0x38,0xd5]
Dbasic-a64-instructions.s3800 msr TTBR0_EL1, x12
4348 mrs x9, TTBR0_EL1
/external/llvm-project/llvm/test/MC/AArch64/
Darm64-system-encoding.s125 msr TTBR0_EL1, x3
204 ; CHECK: msr TTBR0_EL1, x3 ; encoding: [0x03,0x20,0x18,0xd5]
314 mrs x3, TTBR0_EL1
500 ; CHECK: mrs x3, TTBR0_EL1 ; encoding: [0x03,0x20,0x38,0xd5]
Dbasic-a64-instructions.s3787 msr TTBR0_EL1, x12
4334 mrs x9, TTBR0_EL1
/external/linux-kselftest/tools/testing/selftests/kvm/lib/aarch64/
Dprocessor.c302 set_reg(vm, vcpuid, ARM64_SYS_REG(TTBR0_EL1), vm->pgd); in aarch64_vcpu_setup()
/external/OpenCSD/decoder/tests/snapshots/a57_single_step/
Ddevice1.ini360 TTBR0_EL1(size:64)=0x0000000000000000
/external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/
Ddevice1.ini360 TTBR0_EL1(size:64)=0x0000000000000000
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc406 TTBR0_EL1 = 49408,
2470 { "TTBR0_EL1", 0xC100, true, true, {} }, // 216
3775 { "TTBR0_EL1", 216 },
/external/OpenCSD/decoder/tests/snapshots/juno_r1_1/ds-5-dumps/
DTrace_Report_0x13_cpu_3_2015Sep17_104147.txt6 EL1N:0xFFFFFFC000096A08 D5182000 MSR TTBR0_EL1,x0
DTrace_Report_0x10_cpu_0_2015Sep17_104900.txt6 EL1N:0xFFFFFFC000096A08 D5182000 MSR TTBR0_EL1,x0
3359 EL1N:0xFFFFFFC000096A08 D5182000 MSR TTBR0_EL1,x0
6570 EL1N:0xFFFFFFC000096A08 D5182000 MSR TTBR0_EL1,x0
9325 EL1N:0xFFFFFFC000096A08 D5182000 MSR TTBR0_EL1,x0
11678 EL1N:0xFFFFFFC000096A08 D5182000 MSR TTBR0_EL1,x0
13661 EL1N:0xFFFFFFC000096A08 D5182000 MSR TTBR0_EL1,x0
15388 EL1N:0xFFFFFFC000096A08 D5182000 MSR TTBR0_EL1,x0
17142 EL1N:0xFFFFFFC000096A08 D5182000 MSR TTBR0_EL1,x0
19176 EL1N:0xFFFFFFC000096A08 D5182000 MSR TTBR0_EL1,x0
21185 EL1N:0xFFFFFFC000096A08 D5182000 MSR TTBR0_EL1,x0
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td551 def : RWSysReg<"TTBR0_EL1", 0b11, 0b000, 0b0010, 0b0000, 0b000>;
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt3260 # CHECK: msr {{ttbr0_el1|TTBR0_EL1}}, x12
3554 # CHECK: mrs x9, {{ttbr0_el1|TTBR0_EL1}}
/external/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt3273 # CHECK: msr {{ttbr0_el1|TTBR0_EL1}}, x12
3565 # CHECK: mrs x9, {{ttbr0_el1|TTBR0_EL1}}
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td825 def : RWSysReg<"TTBR0_EL1", 0b11, 0b000, 0b0010, 0b0000, 0b000>;
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td830 def : RWSysReg<"TTBR0_EL1", 0b11, 0b000, 0b0010, 0b0000, 0b000>;
/external/OpenCSD/decoder/tests/snapshots-ete/002-ack_test_scr/
Dtest_TARMAC499 226 clk cpu0 IT (190) 163a0de8 d5182000 O EL3h_s : MSR TTBR0_EL1,x0
500 226 clk cpu0 R TTBR0_EL1 00000000:00000000
4910 2004 clk cpu0 IT (1968) 000a5a38:0000100a5a38 d5182000 O EL3h_s : MSR TTBR0_EL1,x0
4911 2004 clk cpu0 R TTBR0_EL1 00000000:00000000
8547 3434 clk cpu0 IT (3398) 000a5a38:0000100a5a38_NS d5182000 O EL2h_n : MSR TTBR0_EL1,x0
8548 3434 clk cpu0 R TTBR0_EL1 00000000:00000000
8965 3609 clk cpu0 IT (3573) 002400d4 d5182000 O EL1h_n : MSR TTBR0_EL1,x0
8966 3609 clk cpu0 R TTBR0_EL1 00000000:162b0000
9108 3648 clk cpu0 IT (3612) 1044022c:00000024022c_NS d5182011 O EL1h_n : MSR TTBR0_EL1,x17
9109 3648 clk cpu0 R TTBR0_EL1 00000000:70250000
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