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Searched refs:T_3 (Results 1 – 14 of 14) sorted by relevance

/external/llvm-project/llvm/test/Transforms/ConstraintElimination/
Dsub.ll22 ; CHECK-NEXT: [[T_3:%.*]] = icmp ult i8 [[START_3]], [[HIGH]]
23 ; CHECK-NEXT: call void @use(i1 [[T_3]])
73 ; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8 [[START_3]], [[HIGH]]
74 ; CHECK-NEXT: call void @use(i1 [[T_3]])
Dadd.ll22 ; CHECK-NEXT: [[T_3:%.*]] = icmp ult i8 [[START_3]], [[HIGH]]
23 ; CHECK-NEXT: call void @use(i1 [[T_3]])
73 ; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8 [[START_3]], [[HIGH]]
74 ; CHECK-NEXT: call void @use(i1 [[T_3]])
Dor.ll28 ; CHECK-NEXT: [[T_3:%.*]] = icmp ugt i32 [[X]], [[Z]]
Dand.ll18 ; CHECK-NEXT: [[T_3:%.*]] = icmp ule i32 [[Y]], [[Z]]
Dsub-nuw.ll22 ; CHECK-NEXT: [[T_3:%.*]] = icmp ult i8 [[START_3]], [[HIGH]]
73 ; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8 [[START_3]], [[HIGH]]
Dadd-nuw.ll22 ; CHECK-NEXT: [[T_3:%.*]] = icmp ult i8 [[START_3]], [[HIGH]]
73 ; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8 [[START_3]], [[HIGH]]
Dule.ll75 ; CHECK-NEXT: [[T_3:%.*]] = icmp ule i32 10, [[X]]
Duge.ll75 ; CHECK-NEXT: [[T_3:%.*]] = icmp uge i32 11, [[X]]
Dgeps.ll112 ; CHECK-NEXT: [[T_3:%.*]] = icmp ult i8* [[START_3]], [[HIGH]]
163 ; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8* [[START_3]], [[HIGH]]
/external/tensorflow/tensorflow/python/ops/structured/
Dstructured_tensor_spec_test.py37 T_3 = tensor_spec.TensorSpec([3]) variable
169 'unbatched': StructuredTensorSpec([], dict(a=T_3, b=R_1_N)),
/external/llvm-project/llvm/test/Transforms/SCCP/
Dconstant-range-struct.ll46 ; CHECK-NEXT: [[T_3:%.*]] = icmp ne i64 [[V2]], 0
47 ; CHECK-NEXT: call void @use(i1 [[T_3]])
Dconditions-ranges.ll832 ; CHECK-NEXT: [[T_3:%.*]] = icmp ne i32 [[A]], 50
833 ; CHECK-NEXT: call void @use(i1 [[T_3]])
912 ; CHECK-NEXT: [[T_3:%.*]] = icmp ne i32 [[A]], 50
913 ; CHECK-NEXT: call void @use(i1 [[T_3]])
1007 ; CHECK-NEXT: [[T_3:%.*]] = icmp ne i32 [[A]], 50
1008 ; CHECK-NEXT: call void @use(i1 [[T_3]])
Dload-store-range.ll275 ; CHECK-NEXT: br i1 [[C_2]], label [[T_3:%.*]], label [[F_3:%.*]]
/external/swiftshader/third_party/subzero/src/
DIceTargetLoweringX86BaseImpl.h1769 Variable *T_1 = nullptr, *T_2 = nullptr, *T_3 = nullptr;
1810 _mov(T_3, Src0Hi);
1811 _sar(T_3, SignExtend);
1813 _shrd(T_2, T_3, ReducedShift);
1815 _mov(DestHi, T_3);
1850 _mov(T_3, Src0Hi);
1851 _sar(T_3, SignExtend);
1852 _mov(DestHi, T_3);
1860 _mov(T_3, Src0Hi);
1869 _shld(T_3, T_2, ConstantShiftAmount);
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