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Searched refs:TrigVal (Results 1 – 7 of 7) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPULegalizerInfo.cpp1599 Register TrigVal; in legalizeSinCos() local
1603 TrigVal = B.buildIntrinsic(Intrinsic::amdgcn_fract, {Ty}, false) in legalizeSinCos()
1607 TrigVal = B.buildFMul(Ty, SrcReg, OneOver2Pi, Flags).getReg(0); in legalizeSinCos()
1612 .addUse(TrigVal) in legalizeSinCos()
DR600ISelLowering.cpp781 SDValue TrigVal = DAG.getNode(TrigNode, DL, VT, in LowerTrig() local
785 return TrigVal; in LowerTrig()
787 return DAG.getNode(ISD::FMUL, DL, VT, TrigVal, in LowerTrig()
DSIISelLowering.cpp7977 SDValue TrigVal; in LowerTrig() local
7985 TrigVal = DAG.getNode(AMDGPUISD::FRACT, DL, VT, MulVal); in LowerTrig()
7987 TrigVal = DAG.getNode(ISD::FMUL, DL, VT, Arg, OneOver2Pi); in LowerTrig()
7992 return DAG.getNode(AMDGPUISD::COS_HW, SDLoc(Op), VT, TrigVal); in LowerTrig()
7994 return DAG.getNode(AMDGPUISD::SIN_HW, SDLoc(Op), VT, TrigVal); in LowerTrig()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp786 SDValue TrigVal = DAG.getNode(TrigNode, DL, VT, in LowerTrig() local
790 return TrigVal; in LowerTrig()
792 return DAG.getNode(ISD::FMUL, DL, VT, TrigVal, in LowerTrig()
DAMDGPULegalizerInfo.cpp2172 Register TrigVal; in legalizeSinCos() local
2176 TrigVal = B.buildIntrinsic(Intrinsic::amdgcn_fract, {Ty}, false) in legalizeSinCos()
2180 TrigVal = B.buildFMul(Ty, SrcReg, OneOver2Pi, Flags).getReg(0); in legalizeSinCos()
2185 .addUse(TrigVal) in legalizeSinCos()
DSIISelLowering.cpp8667 SDValue TrigVal; in LowerTrig() local
8677 TrigVal = DAG.getNode(AMDGPUISD::FRACT, DL, VT, MulVal, Flags); in LowerTrig()
8679 TrigVal = DAG.getNode(ISD::FMUL, DL, VT, Arg, OneOver2Pi, Flags); in LowerTrig()
8684 return DAG.getNode(AMDGPUISD::COS_HW, SDLoc(Op), VT, TrigVal, Flags); in LowerTrig()
8686 return DAG.getNode(AMDGPUISD::SIN_HW, SDLoc(Op), VT, TrigVal, Flags); in LowerTrig()
/external/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp955 SDValue TrigVal = DAG.getNode(TrigNode, DL, VT, in LowerTrig() local
959 return TrigVal; in LowerTrig()
961 return DAG.getNode(ISD::FMUL, DL, VT, TrigVal, in LowerTrig()