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Searched refs:TypeCVI_HIST (Results 1 – 13 of 13) sorted by relevance

/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonBaseInfo.h64 TypeCVI_HIST = 28, enumerator
65 TypeCVI_LAST = TypeCVI_HIST,
DHexagonShuffler.cpp118 (*TUL)[HexagonII::TypeCVI_HIST] = UnitsAndLanes(CVI_XLANE, 4); in SetupTUL()
DHexagonMCChecker.cpp469 if(llvm::HexagonMCInstrInfo::getType(MCII, *HMI.getInst()) == HexagonII::TypeCVI_HIST) { in checkRegisters()
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonDepITypes.h24 TypeCVI_HIST = 12, enumerator
DHexagonDepITypes.td22 def TypeCVI_HIST : IType<12>;
DHexagonDepInstrInfo.td33051 tc_1381a97c, TypeCVI_HIST>, Enc_e3b0c4, Requires<[UseHVXV60]> {
33061 tc_e3f68a46, TypeCVI_HIST>, Enc_217147, Requires<[UseHVXV60]> {
38312 tc_1381a97c, TypeCVI_HIST>, Enc_e3b0c4, Requires<[UseHVXV62]> {
38322 tc_b28e51aa, TypeCVI_HIST>, Enc_efaed8, Requires<[UseHVXV62]> {
38333 tc_e3f68a46, TypeCVI_HIST>, Enc_217147, Requires<[UseHVXV62]> {
38344 tc_767c4e9d, TypeCVI_HIST>, Enc_802dc0, Requires<[UseHVXV62]> {
38356 tc_1381a97c, TypeCVI_HIST>, Enc_e3b0c4, Requires<[UseHVXV62]> {
38366 tc_1381a97c, TypeCVI_HIST>, Enc_e3b0c4, Requires<[UseHVXV62]> {
38376 tc_e3f68a46, TypeCVI_HIST>, Enc_217147, Requires<[UseHVXV62]> {
38387 tc_e3f68a46, TypeCVI_HIST>, Enc_217147, Requires<[UseHVXV62]> {
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonDepITypes.h24 TypeCVI_HIST = 10, enumerator
DHexagonDepITypes.td22 def TypeCVI_HIST : IType<10>;
DHexagonDepInstrInfo.td32344 tc_1381a97c, TypeCVI_HIST>, Enc_e3b0c4, Requires<[UseHVXV60]> {
32353 tc_e3f68a46, TypeCVI_HIST>, Enc_217147, Requires<[UseHVXV60]> {
37202 tc_1381a97c, TypeCVI_HIST>, Enc_e3b0c4, Requires<[UseHVXV62]> {
37211 tc_b28e51aa, TypeCVI_HIST>, Enc_efaed8, Requires<[UseHVXV62]> {
37221 tc_e3f68a46, TypeCVI_HIST>, Enc_217147, Requires<[UseHVXV62]> {
37231 tc_767c4e9d, TypeCVI_HIST>, Enc_802dc0, Requires<[UseHVXV62]> {
37242 tc_1381a97c, TypeCVI_HIST>, Enc_e3b0c4, Requires<[UseHVXV62]> {
37251 tc_1381a97c, TypeCVI_HIST>, Enc_e3b0c4, Requires<[UseHVXV62]> {
37260 tc_e3f68a46, TypeCVI_HIST>, Enc_217147, Requires<[UseHVXV62]> {
37270 tc_e3f68a46, TypeCVI_HIST>, Enc_217147, Requires<[UseHVXV62]> {
/external/llvm/lib/Target/Hexagon/
DHexagonInstrFormatsV60.td35 def TypeCVI_HIST : IType<28>;
213 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_HIST>,
234 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_HIST>,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonShuffler.cpp131 (*TUL)[HexagonII::TypeCVI_HIST] = UnitsAndLanes(CVI_XLANE, 4); in SetupTUL()
DHexagonMCChecker.cpp632 HexagonII::TypeCVI_HIST) { in checkRegisters()
/external/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCChecker.cpp642 HexagonII::TypeCVI_HIST) { in checkRegisters()