Home
last modified time | relevance | path

Searched refs:UseIdx (Results 1 – 25 of 102) sorted by relevance

12345

/external/llvm/include/llvm/MC/
DMCInstrItineraries.h187 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding() argument
197 if ((FirstUseIdx + UseIdx) >= LastUseIdx) in hasPipelineForwarding()
201 Forwardings[FirstUseIdx + UseIdx]; in hasPipelineForwarding()
208 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency() argument
216 int UseCycle = getOperandCycle(UseClass, UseIdx); in getOperandLatency()
222 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx)) in getOperandLatency()
DMCSubtargetInfo.h136 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles() argument
143 if (I->UseIdx < UseIdx) in getReadAdvanceCycles()
145 if (I->UseIdx > UseIdx) in getReadAdvanceCycles()
DMCSchedule.h87 unsigned UseIdx; member
92 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCInstrItineraries.h182 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding() argument
192 if ((FirstUseIdx + UseIdx) >= LastUseIdx) in hasPipelineForwarding()
196 Forwardings[FirstUseIdx + UseIdx]; in hasPipelineForwarding()
203 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency() argument
211 int UseCycle = getOperandCycle(UseClass, UseIdx); in getOperandLatency()
217 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx)) in getOperandLatency()
DMCSubtargetInfo.h177 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles() argument
184 if (I->UseIdx < UseIdx) in getReadAdvanceCycles()
186 if (I->UseIdx > UseIdx) in getReadAdvanceCycles()
DMCSchedule.h96 unsigned UseIdx; member
101 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
/external/llvm-project/llvm/include/llvm/MC/
DMCInstrItineraries.h185 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding() argument
195 if ((FirstUseIdx + UseIdx) >= LastUseIdx) in hasPipelineForwarding()
199 Forwardings[FirstUseIdx + UseIdx]; in hasPipelineForwarding()
206 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency() argument
214 int UseCycle = getOperandCycle(UseClass, UseIdx); in getOperandLatency()
220 hasPipelineForwarding(DefClass, DefIdx, UseClass, UseIdx)) in getOperandLatency()
DMCSubtargetInfo.h180 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles() argument
187 if (I->UseIdx < UseIdx) in getReadAdvanceCycles()
189 if (I->UseIdx > UseIdx) in getReadAdvanceCycles()
DMCSchedule.h96 unsigned UseIdx; member
101 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCVSXSwapRemoval.cpp677 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
679 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs()
680 SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
688 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
696 if (SwapVector[UseIdx].IsSwap && !SwapVector[UseIdx].IsLoad && in recordUnoptimizableWebs()
697 !SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
709 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
743 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
745 if (SwapVector[UseIdx].VSEMI->getOpcode() != MI->getOpcode()) { in recordUnoptimizableWebs()
754 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
[all …]
/external/llvm/lib/CodeGen/
DTargetSchedule.cpp144 unsigned UseIdx = 0; in findUseIdx() local
148 ++UseIdx; in findUseIdx()
150 return UseIdx; in findUseIdx()
202 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
203 int Advance = STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID); in computeOperandLatency()
DLiveRangeEdit.cpp87 SlotIndex UseIdx) const { in allUsesAvailableAt()
89 UseIdx = UseIdx.getRegSlot(true); in allUsesAvailableAt()
110 if (SlotIndex::isSameInstr(OrigIdx, UseIdx)) in allUsesAvailableAt()
113 if (OVNI != li.getVNInfoAt(UseIdx)) in allUsesAvailableAt()
120 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt() argument
137 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx)) in canRematerializeAt()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DLiveRangeEdit.cpp108 SlotIndex UseIdx) const { in allUsesAvailableAt()
110 UseIdx = UseIdx.getRegSlot(true); in allUsesAvailableAt()
131 if (SlotIndex::isSameInstr(OrigIdx, UseIdx)) in allUsesAvailableAt()
134 if (OVNI != li.getVNInfoAt(UseIdx)) in allUsesAvailableAt()
141 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt() argument
158 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx)) in canRematerializeAt()
DTargetSchedule.cpp174 unsigned UseIdx = 0; in findUseIdx() local
178 ++UseIdx; in findUseIdx()
180 return UseIdx; in findUseIdx()
232 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
233 int Advance = STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID); in computeOperandLatency()
/external/llvm-project/llvm/lib/CodeGen/
DLiveRangeEdit.cpp108 SlotIndex UseIdx) const { in allUsesAvailableAt()
110 UseIdx = UseIdx.getRegSlot(true); in allUsesAvailableAt()
131 if (SlotIndex::isSameInstr(OrigIdx, UseIdx)) in allUsesAvailableAt()
134 if (OVNI != li.getVNInfoAt(UseIdx)) in allUsesAvailableAt()
141 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt() argument
158 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx)) in canRematerializeAt()
DLiveIntervalCalc.cpp181 SlotIndex UseIdx; in extendToUses() local
186 UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo + 1).getMBB()); in extendToUses()
198 UseIdx = Indexes->getInstructionIndex(*MI).getRegSlot(isEarlyClobber); in extendToUses()
203 extend(LR, UseIdx, Reg, Undefs); in extendToUses()
DTargetSchedule.cpp174 unsigned UseIdx = 0; in findUseIdx() local
178 ++UseIdx; in findUseIdx()
180 return UseIdx; in findUseIdx()
232 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
233 int Advance = STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID); in computeOperandLatency()
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h284 unsigned UseIdx) const override;
287 SDNode *UseNode, unsigned UseIdx) const override;
317 unsigned UseIdx, unsigned UseAlign) const;
321 unsigned UseIdx, unsigned UseAlign) const;
326 unsigned UseIdx, unsigned UseAlign) const;
332 const MachineInstr &UseMI, unsigned UseIdx,
348 unsigned UseIdx) const override;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCVSXSwapRemoval.cpp677 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
679 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs()
680 SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
688 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
720 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
722 if (SwapVector[UseIdx].VSEMI->getOpcode() != MI->getOpcode()) { in recordUnoptimizableWebs()
731 LLVM_DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
732 LLVM_DEBUG(SwapVector[UseIdx].VSEMI->dump()); in recordUnoptimizableWebs()
762 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
763 SwapVector[UseIdx].WillRemove = 1; in markSwapsForRemoval()
/external/llvm/lib/Target/PowerPC/
DPPCVSXSwapRemoval.cpp672 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
674 if (!SwapVector[UseIdx].IsSwap || SwapVector[UseIdx].IsLoad || in recordUnoptimizableWebs()
675 SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
683 DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
715 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
717 if (SwapVector[UseIdx].VSEMI->getOpcode() != MI->getOpcode()) { in recordUnoptimizableWebs()
725 DEBUG(dbgs() << " use " << UseIdx << ": "); in recordUnoptimizableWebs()
726 DEBUG(SwapVector[UseIdx].VSEMI->dump()); in recordUnoptimizableWebs()
756 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
757 SwapVector[UseIdx].WillRemove = 1; in markSwapsForRemoval()
DPPCInstrInfo.h121 unsigned UseIdx) const override;
124 SDNode *UseNode, unsigned UseIdx) const override { in getOperandLatency() argument
126 UseNode, UseIdx); in getOperandLatency()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h320 unsigned UseIdx) const override;
323 SDNode *UseNode, unsigned UseIdx) const override;
360 unsigned UseIdx, unsigned UseAlign) const;
364 unsigned UseIdx, unsigned UseAlign) const;
369 unsigned UseIdx, unsigned UseAlign) const;
375 const MachineInstr &UseMI, unsigned UseIdx,
391 unsigned UseIdx) const override;
/external/llvm-project/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h318 unsigned UseIdx) const override;
321 SDNode *UseNode, unsigned UseIdx) const override;
412 unsigned UseIdx, unsigned UseAlign) const;
416 unsigned UseIdx, unsigned UseAlign) const;
421 unsigned UseIdx, unsigned UseAlign) const;
427 const MachineInstr &UseMI, unsigned UseIdx,
443 unsigned UseIdx) const override;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
DAbstractCallSite.cpp100 unsigned UseIdx = CS.getArgumentNo(U); in AbstractCallSite() local
107 if (CBCalleeIdx != UseIdx) in AbstractCallSite()
/external/llvm-project/llvm/lib/IR/
DAbstractCallSite.cpp101 unsigned UseIdx = CB->getArgOperandNo(U); in AbstractCallSite() local
108 if (CBCalleeIdx != UseIdx) in AbstractCallSite()

12345